Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
 527
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
• MSBF/CPOL:  Bit  Order  or  SPI  Clock  Polarity
– If USART does not operate in SPI Mode (USART_MODE 
≠ 0xE and 0xF):
MSBF = 0: Least Significant Bit is sent/received first.
MSBF = 1: Most Significant Bit is sent/received first.
– If USART operates in SPI Mode (Slave or Master, USART_MODE = 0xE or 0xF):
CPOL = 0: The inactive state value of SPCK is logic level zero.
CPOL = 1: The inactive state value of SPCK is logic level one.
CPOL is used to determine the inactive state value of the serial clock (SPCK). It is used with CPHA to produce the required
clock/data relationship between master and slave devices.
• MODE9:  9-bit  Character  Length
0: CHRL defines character length.
1: 9-bit character length.
• CLKO:  Clock  Output  Select
0: The USART does not drive the SCK pin.
1: The USART drives the SCK pin if USCLKS does not select the external clock SCK.
• OVER:  Oversampling  Mode
0: 16x Oversampling.
1: 8x Oversampling.
• INACK:  Inhibit  Non  Acknowledge
0: The NACK is generated.
1: The NACK is not generated.
• DSNACK:  Disable  Successive  NACK
0: NACK is sent on the ISO line as soon as a parity error occurs in the received character (unless INACK is set).
1: Successive parity errors are counted up to the value specified in the MAX_ITERATION field. These parity errors gener-
ate a NACK on the ISO line. As soon as this value is reached, no additional NACK is sent on the ISO line. The flag
ITERATION is asserted.
• VAR_SYNC:  Variable  Synchronization  of  Command/Data  Sync  Start  Frame  Delimiter
0: User defined configuration of command or data sync field depending on SYNC value.
1: The sync field is updated when a character is written into US_THR register.
• MAX_ITERATION
Defines the maximum number of iterations in mode ISO7816, protocol T= 0.
• FILTER:  Infrared  Receive  Line  Filter
0: The USART does not filter the receive line.
1: The USART filters the receive line using a three-sample filter (1/16-bit clock) (2 over 3 majority).
• MAN:  Manchester  Encoder/Decoder  Enable
0: Manchester Encoder/Decoder are disabled.