Atmel Evaluation Kit for the SAM4E Series of Flash Microcontrollers ATSAM4E-EK ATSAM4E-EK Data Sheet

SAM4E [DATASHEET]

Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14

1216

These registers reset to zero on a read and stick at all ones when they count to their maximum value. They should
be read frequently enough to prevent loss of data.

The receive statistics registers are only incremented when the receive enable bit (RXEN) is set in the Network
Control Register.

Once a statistics register has been read, it is automatically cleared. When reading the Octets Transmitted and
Octets Received Registers, bits 31:0 should be read prior to bits 47:32 to ensure reliable operation.

Pause Frames Transmitted Register

128 to 255 Byte Frames Received Register

64 Byte Frames Transmitted Register

256 to 511 Byte Frames Received Register

65 to 127 Byte Frames Transmitted Register

512 to 1023 Byte Frames Received Register

128 to 255 Byte Frames Transmitted Register

1024 to 1518 Byte Frames Received Register

256 to 511 Byte Frames Transmitted Register

1519 to Maximum Byte Frames Received Register

512 to 1023 Byte Frames Transmitted Register

Undersize Frames Received Register

1024 to 1518 Byte Frames Transmitted Register

Oversize Frames Received Register

Greater Than 1518 Byte Frames Transmitted Register

Jabbers Received Register

Transmit Underruns Register

Frame Check Sequence Errors Register

Single Collision Frames Register

Length Field Frame Errors Register

Multiple Collision Frames Register

Receive Symbol Errors Register

Excessive Collisions Register

Alignment Errors Register

Late Collisions Register

Receive Resource Errors Register

Deferred Transmission Frames Register

Receive Overrun Register

Carrier Sense Errors Register 

IP Header Checksum Errors Register

Octets Received [31:0] Received

TCP Checksum Errors Register

Octets Received [47:32] Received 

UDP Checksum Errors Register

Frames Received Register