Atmel Evaluation Kit for the SAM4E Series of Flash Microcontrollers ATSAM4E-EK ATSAM4E-EK Data Sheet
Product codes
ATSAM4E-EK
27
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
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Erase pages (EPA) with FARG [1:0] = 0 to erase four pages or FARG [1:0] = 1 to erase eight pages.
FARG [1:0] = 2 and FARG [1:0] = 3 must not be used.
FARG [1:0] = 2 and FARG [1:0] = 3 must not be used.
48 Kbyte and 64 Kbyte sectors
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One block of 8 pages inside any sector, with the command Erase pages (EPA) with FARG[1:0] = 1
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One block of 16 pages inside any sector, with the command Erase pages (EPA) and FARG[1:0] = 2
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One block of 32 pages inside any sector, with the command Erase pages (EPA) and FARG[1:0] = 3
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One sector with the command Erase sector (ES) and FARG set to a page number in the sector to
erase
erase
Entire memory plane
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The entire Flash, with the command Erase all (EA).
The write commands of the Flash cannot be used under 330 kHz.
8.1.3.2 Enhanced Embedded Flash Controller
The Enhanced Embedded Flash Controller manages accesses performed by the masters of the system. It enables
reading the Flash and writing the write buffer. It also contains a User Interface, mapped on the APB.
reading the Flash and writing the write buffer. It also contains a User Interface, mapped on the APB.
The Enhanced Embedded Flash Controller ensures the interface of the Flash block.
It manages the programming, erasing, locking and unlocking sequences of the Flash using a full set of commands.
One of the commands returns the embedded Flash descriptor definition that informs the system about the Flash
organization, thus making the software generic.
organization, thus making the software generic.
8.1.3.3 Flash Speed
The user needs to set the number of wait states depending on the frequency used:
For more details, refer to the “AC Characteristics” section of the product “Electrical Characteristics”.
Target for the Flash speed at 0 wait state: 24 MHz.
8.1.3.4 Lock Regions
Several lock bits are used to protect write and erase operations on lock regions. A lock region is composed of
several consecutive pages, and each lock region has its associated lock bit.
several consecutive pages, and each lock region has its associated lock bit.
If a locked-region’s erase or program command occurs, the command is aborted and the EEFC triggers an
interrupt.
interrupt.
The lock bits are software programmable through the EEFC User Interface. The command “Set Lock Bit” enables
the protection. The command “Clear Lock Bit” unlocks the lock region.
the protection. The command “Clear Lock Bit” unlocks the lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
8.1.3.5 Security Bit Feature
The SAM4E device features a security bit, based on a specific General Purpose NVM bit (GPNVM bit 0). When the
security is enabled, any access to the Flash, SRAM, Core Registers and Internal Peripherals either through the
ICE interface or through the Fast Flash Programming Interface, is forbidden. This ensures the confidentiality of the
code programmed in the Flash.
security is enabled, any access to the Flash, SRAM, Core Registers and Internal Peripherals either through the
ICE interface or through the Fast Flash Programming Interface, is forbidden. This ensures the confidentiality of the
code programmed in the Flash.
This security bit can only be enabled through the command “Set General Purpose NVM Bit 0” of the EEFC User
Interface. Disabling the security bit can only be achieved by asserting the ERASE pin at 1, and after a full Flash
Interface. Disabling the security bit can only be achieved by asserting the ERASE pin at 1, and after a full Flash
Table 8-1.
Lock bit number
Product
Number of lock bits
Lock region size
SAM4E
128
8 Kbytes