Atmel Evaluation Kit for the SAM4E Series of Flash Microcontrollers ATSAM4E-EK ATSAM4E-EK Data Sheet

Product codes
ATSAM4E-EK
Page of 1506
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
732
Notes:
1. Reset value depends on the product implementation.
2. PIO_ODSR is Read-only or Read/Write depending on PIO_OWSR I/O lines.
3. Reset value of PIO_PDSR depends on the level of the I/O lines. Reading the I/O line levels requires the clock of the PIO 
Controller to be enabled, otherwise PIO_PDSR reads the levels present on the I/O line at the time the clock was disabled.
4. PIO_ISR is reset at 0x0. However, the first read of the register may read a different value as input changes may have 
occurred.
5. If an offset is not listed in the table it must be considered as reserved.
0x160
Parallel Capture Interrupt Status Register
PIO_PCISR
Read-only
0x00000000
0x164
Parallel Capture Reception Holding Register
PIO_PCRHR
Read-only
0x00000000
0x0168–0x018C
Reserved for PDC Registers
Table 34-4.
Register Mapping (Continued)
Offset
Register
Name
Access
Reset