Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet
Product codes
ATSAMD21-XPRO
22
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
9.
Memories
9.1
Embedded Memories
z
Internal high-speed flash
z
Internal high-speed RAM, single-cycle access at full speed
9.2
Physical Memory Map
The High-Speed bus is implemented as a bus matrix. All High-Speed bus addresses are fixed, and they are never
remapped in any way, even during boot. The 32-bit physical address space is mapped as follow:
remapped in any way, even during boot. The 32-bit physical address space is mapped as follow:
Table 9-1.
SAM D21 physical memory map
Note:
1. x = G, J or E. Refer to
for details.
Table 9-2.
Flash memory parameters
(1)
Note:
1. x = G, J or E. Refer to
for details.
2. The number of pages (NVMP) and page size (PSZ) can be read from the NVM Pages and Page Size bits in
the NVM Parameter register in the NVMCTRL (PARAM.NVMP and PARAM.PSZ, respectively). Refer to
for details.
Memory
Start address
Size
SAMD21x18
SAMD21x17
SAMD21x16
SAMD21x15
Embedded Flash
0x00000000
256Kbytes
128Kbytes
64Kbytes
32Kbytes
Embedded SRAM
0x20000000
32Kbytes
16Kbytes
8Kbytes
4Kbytes
Peripheral Bridge A
0x40000000
64Kbytes
64Kbytes
64Kbytes
64Kbytes
Peripheral Bridge B
0x41000000
64Kbytes
64Kbytes
64Kbytes
64Kbytes
Peripheral Bridge C
0x42000000
64Kbytes
64Kbytes
64Kbytes
64Kbytes
Device
Flash size
Number of pages
Page size
SAMD21x18
256Kbytes
4096
64 bytes
SAMD21x17
128Kbytes
2046
64 bytes
SAMD21x16
64Kbytes
1024
64 bytes
SAMD21x15
32Kbytes
512
64 bytes