Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet
Product codes
ATSAMD21-XPRO
820
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
z
Bit 1 – TRCPT1: Transfer Complete Bank 1 interrupt Enable
0: The Transfer Complete Bank 1 interrupt is disabled.
1: The Transfer Complete Bank 1 interrupt is enabled and an interrupt request will be generated when the Transfer
Complete interrupt Flag 1 is set.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the Transfer Complete interrupt Enable bit 1 and disable the corresponding inter-
rupt request.
0: The Transfer Complete Bank 1 interrupt is disabled.
1: The Transfer Complete Bank 1 interrupt is enabled and an interrupt request will be generated when the Transfer
Complete interrupt Flag 1 is set.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the Transfer Complete interrupt Enable bit 1 and disable the corresponding inter-
rupt request.
z
Bit 0 – TRCPT0: Transfer Complete Bank 0 interrupt Enable
0: The Transfer Complete Bank 0 interrupt is disabled.
1: The Transfer Complete Bank 0 interrupt is enabled and an interrupt request will be generated when the Transfer
Complete interrupt 0 Flag is set.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the Transfer Complete interrupt Enable bit 0 and disable the corresponding inter-
rupt request.
0: The Transfer Complete Bank 0 interrupt is disabled.
1: The Transfer Complete Bank 0 interrupt is enabled and an interrupt request will be generated when the Transfer
Complete interrupt 0 Flag is set.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the Transfer Complete interrupt Enable bit 0 and disable the corresponding inter-
rupt request.