Atmel ATmega328P Xplained Mini MEGA328P-XMINI MEGA328P-XMINI Data Sheet
Product codes
MEGA328P-XMINI
107
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
Atmel-8271H-AVR- ATmega-Datasheet_08/2014
Note:
1.
A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Compare Match is
ignored, but the set or clear is done at TOP. See
ignored, but the set or clear is done at TOP. See
for more details.
• Bits 3, 2 – Reserved
These bits are reserved bits in the ATmega48A/PA/88A/PA/168A/PA/328/P and will always read as zero.
• Bits 1:0 – WGM01:0: Waveform Generation Mode
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting sequence of the
counter, the source for maximum (TOP) counter value, and what type of waveform generation to be used, see
counter, the source for maximum (TOP) counter value, and what type of waveform generation to be used, see
. Modes of operation supported by the Timer/Counter unit are: Normal mode (counter), Clear Timer
on Compare Match (CTC) mode, and two types of Pulse Width Modulation (PWM) modes (see
).
Notes: 1.
MAX = 0xFF
2.
BOTTOM = 0x00
Table 15-7.
Compare Output Mode, Phase Correct PWM Mode
COM0B1
COM0B0
Description
0
0
Normal port operation, OC0B disconnected.
0
1
Reserved
1
0
Clear OC0B on Compare Match when up-counting. Set OC0B on
Compare Match when down-counting.
Compare Match when down-counting.
1
1
Set OC0B on Compare Match when up-counting. Clear OC0B on
Compare Match when down-counting.
Compare Match when down-counting.
Table 15-8.
Waveform Generation Mode Bit Description
Mode
WGM02
WGM01
WGM00
Timer/Counter
Mode of
Operation
Mode of
Operation
TOP
Update of
OCRx at
TOV Flag
Set on
0
0
0
0
Normal
0xFF
Immediate
MAX
1
0
0
1
PWM, Phase
Correct
Correct
0xFF
TOP
BOTTOM
2
0
1
0
CTC
OCRA
Immediate
MAX
3
0
1
1
Fast PWM
0xFF
BOTTOM
MAX
4
1
0
0
Reserved
–
–
–
5
1
0
1
PWM, Phase
Correct
Correct
OCRA
TOP
BOTTOM
6
1
1
0
Reserved
–
–
–
7
1
1
1
Fast PWM
OCRA
BOTTOM
TOP