Nxp Semiconductors OM11043 Data Sheet

LPC1769_68_67_66_65_64_63

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© NXP Semiconductors N.V. 2014. All rights reserved.

 

 

[1]

V

DDA

 and VREFP should be tied to V

DD(3V3)

 if the ADC and DAC are not used.

[2]

The ADC is monotonic, there are no missing codes.

[3]

The differential linearity error (E

D

) is the difference between the actual step width and the ideal step width. See 

[4]

The integral non-linearity (E

L(adj)

) is the peak difference between the center of the steps of the actual and the ideal transfer curve after 

appropriate adjustment of gain and offset errors. See 

[5]

The offset error (E

O

) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the 

ideal curve. See 

.

[6]

ADCOFFS value (bits 7:4) = 2 in the ADTRM register. See LPC17xx user manual UM10360.

[7]

The gain error (E

G

) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset 

error, and the straight line which fits the ideal transfer curve. See 

.

[8]

The absolute error (E

T

) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated 

ADC and the ideal transfer curve. See 

.

[9]

See 

[10] The conversion frequency corresponds to the number of samples per second.

SCK (CPOL = 0)

MOSI

MISO

T

SPICYC

t

SPICLKH

t

SPICLKL

t

SPIDSU

t

SPIDH

t

SPIQV

DATA VALID

DATA VALID

t

SPIOH

SCK (CPOL = 1)

DATA VALID

DATA VALID







V

IA

analog input voltage

0

-

V

DDA

V

C

ia

analog input capacitance

-

-

15

pF

E

D

differential linearity error

-

-

1

LSB

E

L(adj)

integral non-linearity

-

-

3

LSB

E

O

offset error

-

-

2

LSB

E

G

gain error

-

-

0.5

%

E

T

absolute error

-

-

4

LSB

R

vsi

voltage source interface 
resistance

-

-

7.5

k



f

clk(ADC)

ADC clock frequency

-

-

13

MHz

f

c(ADC)

ADC conversion frequency

-

-

200

kHz