Taskit ARM9 CPU-module with Linux Stamp9261-series Stamp9261 (64F/64R) 542310 Data Sheet
Product codes
542310
The "BGR" (blue-green-red) sequence in the SAM9261 LCDC is not frequently used by graphics
libraries or bitmaps ("RGB" is more of a standard), neither is the use of bit 15 as an intensity bit. Of
course, the first problem can be circumvented by connecting the LCDC lines to the LCD in a way
deviating from the Atmel designation, that is, by exchanging the "blue" against the "red" lines.
libraries or bitmaps ("RGB" is more of a standard), neither is the use of bit 15 as an intensity bit. Of
course, the first problem can be circumvented by connecting the LCDC lines to the LCD in a way
deviating from the Atmel designation, that is, by exchanging the "blue" against the "red" lines.
The Linux frame buffer driver offers a function which returns the information about the frame buffer
structure including the assignment of each frame buffer bit to a color channel bit. It is recommended
that graphics software uses this function in order to achieve a correct color representation.
structure including the assignment of each frame buffer bit to a color channel bit. It is recommended
that graphics software uses this function in order to achieve a correct color representation.
4.14. LCDC DMA and FIFO
To provide for a periodic display refresh, the LCDC comprises a DMA channel and a 2 KB FIFO.
4.15. Display (TFT)
The Stamp9261 is provided without a display. The implementation of a display design is subject to the
user.
user.
4.16. Touchscreen
The SPI-based ADS7843 is is implemented on the Evaluation-Board Design. It is connected to the
Second SPI-Bus of the AT91SAM9261. It's Pins are multiplexed with the Knob on the Evaluation-
Board so both input devices can't be used at the same time.
Second SPI-Bus of the AT91SAM9261. It's Pins are multiplexed with the Knob on the Evaluation-
Board so both input devices can't be used at the same time.
4.17. Advanced Interrupt Controller (AIC)
The Advanced Interrupt Controller can handle up to 32 internal or external interrupt sources. On the
SAM9261 processor, only 24 of them are actually used.
SAM9261 processor, only 24 of them are actually used.
The AIC integrates an 8-level priority controller.
Interrupt sources can be programmed to be level sensitive or edge triggered. The polarity can be
programmed for all external
programmed for all external
interrupt sources.
There are three external interrupt signals available on the connectors of the Stamp9261:
-
IRQ0, IRQ1, and IRQ2.
Moreover, all PIO lines can be used to generate a PIO interrupt. However, the PIO lines can only
generate level change interrupts, that is, positive as well as negative edges will generate an interrupt.
The PIO interrupt itself (PIO to AIC line) is usually programmed to be level-sensitive. Otherwise
interrupts will be lost if multiple PIO lines source an interrupt simultaneously.
generate level change interrupts, that is, positive as well as negative edges will generate an interrupt.
The PIO interrupt itself (PIO to AIC line) is usually programmed to be level-sensitive. Otherwise
interrupts will be lost if multiple PIO lines source an interrupt simultaneously.
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