STMicroelectronics FlexSPIN: SPI configurable stepper and DC multi motor driver evaluation board EVAL6460 EVAL6460 Data Sheet
Product codes
EVAL6460
Power saving modes
L6460
46/139
Doc ID 17713 Rev 1
10.2 Hibernate
mode
L6460’s hibernate mode allows the firmware to switch off some (or all) selected System
Regulators leaving in on state only those necessary to resume L6460 to operative condition
when waked-up by an external signal.
Regulators leaving in on state only those necessary to resume L6460 to operative condition
when waked-up by an external signal.
Hibernate mode is selected when the firmware writes the command word in the
HibernateCmd register. When in hibernate mode L6460 will force regulators in the state
(on/off) selected by the firmware by writing in the HibernateCmd register and will force
nRESET pin low.
HibernateCmd register. When in hibernate mode L6460 will force regulators in the state
(on/off) selected by the firmware by writing in the HibernateCmd register and will force
nRESET pin low.
The exiting from hibernate mode is achieved by forcing at low level nAWAKE pin (or GPIO5
pin if L6460 is in Slave mode); L6460 will also exit from hibernate mode if an undervoltage
event happens on V
pin if L6460 is in Slave mode); L6460 will also exit from hibernate mode if an undervoltage
event happens on V
Supply
, V
SupplyInt
, V
Pump
or V
3v3
.
When the exit from hibernate mode is due to an external command, L6460 sets to ‘1’ the bit
HibModeLth in the HibernateStatus register.
HibModeLth in the HibernateStatus register.
10.3
Low power mode
When in normal operating mode, the microcontroller can place L6460 in “Low Power mode”.
In this condition L6460 sets all bridges outputs in high impedance, powers down all
regulators (including system regulators and charge pump) and disables almost all its circuits
including internal clock reducing as much as possible power consumption.
regulators (including system regulators and charge pump) and disables almost all its circuits
including internal clock reducing as much as possible power consumption.
The only circuits that remain active are:
–
V
3V3
internal regulator.
–
nAWAKE pin current pull-up.
–
nRESET pin that will be pulled low.
–
POR circuit.
The entering in low power mode is obtained in different ways depending if L6460 is
configured as slave device or not. When L6460 is configured as slave device the low power
mode is directly controlled by nAWAKE pin that acts as an enable: if this pin is low for a time
longer then t
configured as slave device or not. When L6460 is configured as slave device the low power
mode is directly controlled by nAWAKE pin that acts as an enable: if this pin is low for a time
longer then t
AWAKEFILT
, Low Power mode is entered; if this pin is high L6460 exits from Low
Power mode.
In all other start-up configurations, Low Power mode is entered by writing a Low Power
mode command in the PowerModeControl register; once L6460 is in Low Power mode it
starts checking the nAWAKE pin status: if it is found low for a time longer than t
mode command in the PowerModeControl register; once L6460 is in Low Power mode it
starts checking the nAWAKE pin status: if it is found low for a time longer than t
AWAKEFILT
,
L6460 exits from Low Power mode and restarts its startup sequence. When the nAWAKE
pin is externally pulled low, the “AWAKE” event is stored and it is readable through SPI.
L6460 will also exit from Low Power mode if a POR event is found.
pin is externally pulled low, the “AWAKE” event is stored and it is readable through SPI.
L6460 will also exit from Low Power mode if a POR event is found.
Note:
When in “Low power mode” V
Supply
is monitored only for its power on reset level.
10.4 nAWAKE
pin
At the start up, before L6460 has identified the required operation mode (see
), a
current sink I
INP
is always active to pull down nAWAKE pin. As soon as the operation mode
(basic, slave, master or single device) is detected, the functionality of nAWAKE pin will be
different.
different.