STMicroelectronics 19 V - 75 W SMPS using the L6563 and the L6566A EVL6566A-75WES4 EVL6566A-75WES4 Data Sheet

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Doc ID 16116 Rev 4

The third communication line is the pin PWM_STOP (#9), which works in conjunction with 
the pin RUN (#10). The purpose of the PWM_STOP pin is to inhibit the PWM activity of both 
the PFC stage and the cascaded dc-dc converter. The pin is an open collector, normally 
open, that goes low if the device is disabled by a voltage lower than 0.8 V on the RUN pin. 
The pin goes again open if the voltage on pin RUN exceeds 0.88V. It is important to point out 
that this function works correctly in systems where the PFC stage is the master and the 
cascaded dc-dc converter is the slave or, in other words, where the PFC stage starts first, 
powers both controllers and enables/disables the operation of the dc-dc stage. The pin RUN 
can be used to start and stop the main converter. In the simplest case, to enable/disable the 
PWM controller the pin PWM_STOP can be connected to the output of the error amplifier 
(

a

). 

If the chip is provided with a soft-start pin, it is possible to delay the start-up of the dc-dc 
stage with respect to that of the PFC stage, which is often desired, as described in 

. An underlying assumption in order for that to work properly is that the UVLO 

thresholds of the PWM controller are certainly higher than those of the L6563S.

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