Intel Core™2 Quad Processor Q9400 (6M Cache, 2.66 GHz, 1333 MHz FSB) BX80569Q9400 User Manual

Product codes
BX80569Q9400
Page of 104
Introduction
12
Datasheet
The processor uses some of the infrastructure already enabled by 775_VR_CONFIG_05 
platforms including heatsink, heatsink retention mechanism, and socket. 
Manufacturability is a high priority; hence, mechanical assembly may be completed 
from the top of the baseboard and should not require any special tooling.
1.1
Terminology
A ‘#’ symbol after a signal name refers to an active low signal, indicating a signal is in 
the active state when driven to a low level. For example, when RESET# is low, a reset 
has been requested. Conversely, when NMI is high, a nonmaskable interrupt has 
occurred. In the case of signals where the name does not imply an active state but 
describes part of a binary sequence (such as address or data), the ‘#’ symbol implies 
that the signal is inverted. For example, D[3:0] = ‘HLHL’ refers to a hex ‘A’, and 
D[3:0]# = ‘LHLH’ also refers to a hex ‘A’ (H= High logic level, L= Low logic level).
“Front Side Bus” refers to the interface between the processor and system core logic 
(a.k.a. the chipset components). The FSB is a multiprocessing interface to processors, 
memory, and I/O.
1.1.1
Processor Terminology Definitions
Commonly used terms are explained here for clarification:
• Intel
®
 Core™2 Extreme processor QX9000 series — Quad core Extreme 
Edition processor in the FC-LGA6 package with two 6 MB L2 cache. 
• Intel
®
 Core™2 Quad processor Q9000 series — Quad core processor in the FC-
LGA8 package with two 6 MB L2 caches or two 3 MB L2 caches. 
• Intel
®
 Core™2 Quad processor Q8000 Series — Quad core processor in the 
FC-LGA8 package with two 4 MB L2 caches or two 2 MB L2 caches..
• Intel
®
 Core™2 Quad processor Q9000S series — Low power Quad core 
processor in the FC-LGA8 package with two 6 MB L2 caches or two 3 MB L2 caches. 
• Intel
®
 Core™2 Quad Processor Q8000S Series — Low power Quad core 
processor in the FC-LGA8 package with two 4 MB L2 caches or two 2 MB L2 caches 
caches.
• Processor — For this document, the term processor is the generic form of the 
Intel
®
 Core™2 Extreme processor QX9000 series, the Intel
®
 Core™2 Quad 
processor Q9000, Q9000S, Q8000, and Q8000S series.
• Enhanced Intel
®
 Core
TM
 microarchitecture — A new foundation for Intel
®
 
architecture-based desktop, mobile and mainstream server multi-core processors. 
For additional information refer to: 
http://www.intel.com/technology/architecture/
coremicro/
• Keep-out zone — The area on or near the processor that system design can not 
utilize. 
• Processor core — Processor die with integrated L2 cache. 
• LGA775 socket — The processor mates with the system board through a surface 
mount, 775-land, LGA socket.
• Integrated heat spreader (IHS) —A component of the processor package used 
to enhance the thermal performance of the package. Component thermal solutions 
interface with the processor at the IHS surface.
• Retention mechanism (RM) — Since the LGA775 socket does not include any 
mechanical features for heatsink attach, a retention mechanism is required. 
Component thermal solutions should attach to the processor via a retention 
mechanism that is independent of the socket.
• FSB (Front Side Bus) — The electrical interface that connects the processor to 
the chipset. Also referred to as the processor system bus or the system bus. All