Intel III Xeon 900 MHz 80526KY9002M Data Sheet
Product codes
80526KY9002M
PENTIUM® III XEON™ PROCESSOR AT 600 MHz to 1 GHz with 256KB L2 Cache
PROCESSOR FEATURES
40
2 . A u t o H A L T P o w e r D o w n S t a t e
B C L K r u n n i n g .
S n o o p s a n d i n t e r r u p t s a l l o w e d .
H A L T I n s t r u c t i o n a n d
H A L T B u s C y c l e G e n e r a t e d
I N I T # , B I N I T # , I N T R , N M I ,
S M I # , R E S E T #
1 . N o r m a l S t a t e
N o r m a l e x e c u t i o n .
S T P C L K #
A s s e r t e d
S T P C L K #
D e - a s s e r t e d
3 . S t o p G r a n t S t a t e
B C L K r u n n i n g .
S n o o p s a n d i n t e r r u p t s a l l o w e d .
S L P #
A s s e r t e d
S L P #
D e - a s s e r t e d
5 . S l e e p S t a t e
B C L K r u n n i n g .
N o s n o o p s o r i n t e r r u p t s a l l o w e d .
4 . H A L T / G r a n t S n o o p S t a t e
B C L K r u n n i n g .
S e r v i c e s n o o p s t o c a c h e s .
S n o o p E v e n t O c c u r s
S n o o p E v e n t S e r v i c e d
S n o o p
E v e n t
O c c u r s
S n o o p
E v e n t
S e r v i c e d
STPCLK# Asserted
STPCLK# De-asserted
P6CB757a
P6CB757b
P6CB757b
Figure 15. Stop Clock State Machine
5.1.3
STOP-GRANT STATE — STATE 3
The Stop-Grant state on the Pentium® III Xeon™ processor at 600 MHz+ is entered when the STPCLK#
signal is asserted. The Pentium III Xeon processor at 600 MHz+ will issue a Stop-Grant Transaction Cycle.
Exit latency from this mode is 10 BLCK periods after the STPCLK# signal is deasserted.
signal is asserted. The Pentium III Xeon processor at 600 MHz+ will issue a Stop-Grant Transaction Cycle.
Exit latency from this mode is 10 BLCK periods after the STPCLK# signal is deasserted.
Since the AGTL+ signal pins receive power from the system bus, these pins should not be driven (allowing the
level to return to VTT) for minimum power drawn by the termination resistors in this state. In addition, all other
input pins on the system bus should be driven to the inactive state.
level to return to VTT) for minimum power drawn by the termination resistors in this state. In addition, all other
input pins on the system bus should be driven to the inactive state.
BINIT# will not be serviced while the processor is in Stop-Grant state. The event will be latched and can be
serviced by software upon exit from Stop-Grant state.
serviced by software upon exit from Stop-Grant state.
FLUSH# will not be serviced during Stop Grant state.
RESET# will cause the processor to immediately initialize itself; but the processor will stay in Stop Grant state.
A transition back to the Normal state will occur with the deassertion of the STPCLK# signal.
A transition back to the Normal state will occur with the deassertion of the STPCLK# signal.
A transition to the HALT/Grant Snoop state will occur when the processor detects a snoop phase on the
system bus. A transition to the Sleep state will occur with the assertion of the SLP# signal.
system bus. A transition to the Sleep state will occur with the assertion of the SLP# signal.
While in the Stop Grant State, all other interrupts will be latched by the Pentium III Xeon processor at 600
MHz+, and only serviced when the processor returns to the Normal State.
MHz+, and only serviced when the processor returns to the Normal State.
5.1.4
HALT/GRANT SNOOP STATE — STATE 4
The Pentium III Xeon processor at 600 MHz+ will respond to snoop phase transactions (initiated by ADS#) on
the system bus while in Stop-Grant state or in Auto HALT Power Down state. When a snoop transaction is
presented upon the system bus, the processor will enter the HALT/Grant Snoop state. The processor will stay
in this state until the snoop on the system bus has been serviced (whether by the processor or another agent
on the system bus). After the snoop is serviced, the processor will return to the Stop-Grant state or Auto HALT
Power Down state, as appropriate.
the system bus while in Stop-Grant state or in Auto HALT Power Down state. When a snoop transaction is
presented upon the system bus, the processor will enter the HALT/Grant Snoop state. The processor will stay
in this state until the snoop on the system bus has been serviced (whether by the processor or another agent
on the system bus). After the snoop is serviced, the processor will return to the Stop-Grant state or Auto HALT
Power Down state, as appropriate.