Intel III Xeon 900 MHz 80526KY9002M Data Sheet

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In this document, a ‘#’ symbol after a signal name refers to an active low signal. This means that a signal is in the active
state (based on the name of the signal) when driven to a low level. For example, when FLUSH# is low, a flush has been
requested. When NMI is high, a non-maskable interrupt has occurred. In the case of lines where the name does not imply
an active state but describes part of a binary sequence (such as address or data), the ‘#’ symbol implies that the signal is
inverted. For example, D[3:0] = ‘HLHL’ refers to a hex ‘A’, and D [3:0] # = ‘LHLH’ also refers to a hex ‘A’ (H= High logic
level, L= Low logic level).

The term ‘system bus’ refers to the interface between the processor, system core logic and other bus agents. The system
bus is a multiprocessing interface to processors, memory and I/O. Cache coherency is maintained with other agents on
the system bus through the MESI cache protocol as supported by the HIT# and HITM# bus signals. The term Pentium III
Xeon processor at 600 MHz+ refers to the cartridge package that interfaces to a host system board through the SC330.1
connector. The Pentium III Xeon processor at 600 MHz+ includes the processor core with integrated L2 cache, an On-
Cartridge Voltage Regulator (OCVR), system bus termination and various system management features. In addition, the
Pentium III Xeon processor at 600 MHz+ includes a thermal plate for cooling solution attachment and a protective cover.

The Pentium III Xeon processor at 600 MHz+ system bus operates using GTL+ signaling levels with a new type of buffer
utilizing active negation and multiple terminations. This bus logic is called Assisted Gunning Transistor Logic, or AGTL+.
This document provides information to allow the user to design a system using Pentium III Xeon processor at 600 MHz+.

The following terms are used in this document and are defined here for clarification:

•

 

Cover — The processor casing on the opposite side of the thermal plate.

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Pentium® III Xeon™ processor at 600 MHz+  - refers to Pentium III Xeon Processors that utilize  On  Cartridge
Voltage Regulator technology, or “OCVR”. The OCVR regulates V

CC_CORE

 (the appropriate cartridge input voltage) to

the required processor core voltage (V

CC_CPU

). The OCVR was developed to provide the necessary regulation to

guarantee the highest possible frequency of operation for the 600+ MHz Pentium III Xeon processor.

•

 

Pentium® III Xeon™ processor - refers to a Pentium III Xeon Processor at 500MHz or 550MHz, a 100MHz system
bus, without an OCVR, and requires separate VCC CORE & L2 voltage sources.

•

 

FMB (Flexible Motherboard Specification) - A set of specifications to which a design is targeted to allow forward
compatibility with existing and future processors.

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L1 cache  — Integrated static RAM used to maintain recently used information. Due to code locality, maintaining
recently used information can significantly improve system performance in many applications. The L1 cache is
integrated directly on the processor core.

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L2 cache  —The L2 cache is integrated directly on the processor core for the Pentium III Xeon processor at 600
MHz+, or is located on the substrate for the Pentium III Xeon processor.

•

 

2.8V Pentium III Xeon processor — refers to a Pentium III Xeon processor at 600 MHz+  that can be powered with
+2.8 volts applied to its VCC_CORE pins.

•

 

5/12V Pentium III Xeon processor — refers to a Pentium III Xeon processor at 600 MHz+ that can be powered with
either +5.0 or +12.0 volts applied to its VCC_CORE pins.

•

 

HV_EN# —pin added to the SC330.1 definition as a way of differentiating a 5/12V Pentium III Xeon processor from a
2.8V Pentium III Xeon processor. HV_EN# is tied to VSS (ground) on the 5/12V Pentium III Xeon processor, and is
high impedance (floating) on the 2.8V Pentium III Xeon processor. This is a reserved (no connect) pin on Pentium®
III Xeon™ processors.

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Processor substrate  — The structure on which components are mounted inside the S.E.C. cartridge (with or
without components attached).

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Processor core — The processor’s execution engine.

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S.E.C. cartridge — The processor packaging technology used for the Pentium II Xeon processor family. S.E.C. is
short for  "Single Edge Contact” cartridge.

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Streaming SIMD Extensions  

— 

A new set of instructions supported by Intel processors beginning with the

Pentium® III Xeon™ processor. Single Instruction Multiple Data (SIMD) extensions significantly accelerate
performance of 3D graphics. Besides 3D graphics improvements, the extensions also include additional integer and
cacheability instructions that improve other aspects of performance.

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Thermal plate  — The surface used to connect a heat sink or other thermal solution to the processor.