Intel III Xeon 900 MHz 80526KY9002M Data Sheet

Product codes
80526KY9002M
Page of 103
PENTIUM® III XEON™ PROCESSOR AT 600 MHz to 1  GHz with 256KB L2 Cache
INTEGRATION TOOLS
75
The ITP will connect to the system through the debug port. Recommended connectors, to mate the ITP cable
with the debug port on the board, are available in either a vertical or right angle configuration. Both
configurations fit into the same board footprint. The connectors are manufactured by AMP Incorporated and
are in the AMPMODU System 50 line. Following are the AMP part numbers for the two connectors:
 
Amp 30-pin shrouded vertical header: 104068-3
 
Amp 30-pin shrouded right-angle header: 104069-5
NOTE
These are high density through hole connectors with pins on 0.050 in. by 0.100 in. centers. Do not
confuse these with the more common 0.100 in. by 0.100 in. center headers.
The debug port must be mounted on the system baseboard; the processor does not contain a debug
port.
8.1.3 KEEP OUT CONCERNS
Two keep out concerns need to be taken into account when designing a system that will support an ITP.
First, system designers need to be aware that in order for the ITP cabling to egress the system under test,
they must either remove the “skins” of the system under test, or, when this is not possible, design an
aperture into the system.
Secondly, keep out regions will be required around the debug port connector.  See Figure 30 for the keep out
region required for the Pentium® III Xeon™ processor at 600 MHz+  system designs.
Figure 30.  Debug Port Connector Keep Out Region
8.1.4 ADDITIONAL INTEGRATION TOOL MECHANICAL KEEP OUTS
Please contact your Integration Tools vendor for any additional mechanical keep out restrictions for the
Pentium III Xeon processor at 600 MHz+ system design.
TOP VIEW OF DEBUG PORT CONNECTOR
WITH COMPONENT KEEP OUT AREA
PROJECTION