Intel U1300 LE80538UE0042M Data Sheet

12

  

 Specification 

Update 

AE21 X X 

X  No 

Fix 

Disable Execution-Disable Bit (IA32_MISC_ENABLES [34]) Is 
Shared between Cores 

AE22 X X 

 

No 

Fix 

Last Branch Records (LBR) Updates May Be Incorrect after a 
Task Switch 

AE23 X X 

 

No 

Fix 

Address Reported by Machine-Check Architecture (MCA) on 
Single-Bit L2 ECC Errors May Be Incorrect 

AE24 X X 

 

No 

Fix 

Disabling of Single-Step On Branch Operation May Be Delayed 
following a POPFD Instruction 

AE25 X X 

 

No 

Fix 

Performance Monitoring Counters That Count External Bus 
Events May Report Incorrect Values after Processor Power 
State Transitions 

AE26 X X 

 

No 

Fix 

VERW/VERR/LSL/LAR Instructions May Unexpectedly Update 
the Last Exception Record (LER) MSR 

AE27 X X 

 

No 

Fix 

General Protection (#GP) Fault May Not Be Signaled on Data 
Segment Limit Violation above 4-G Limit 

AE28 X X 

 

No 

Fix 

Performance Monitoring Events for Retired Floating Point 
Operations (C1h) May Not Be Accurate 

AE29 X X 

 

No 

Fix 

DR3 Address Match on MOVD/MOVQ/MOVNTQ Memory Store 
Instruction May Incorrectly Increment Performance Monitoring 
Count for Saturating SIMD Instructions Retired (Event CFH) 

AE30 X X 

 

No 

Fix 

Global Pages in the Data Translation Look-Aside Buffer (DTLB) 
May Not Be Flushed by RSM instruction before Restoring the 
Architectural State from SMRAM 

AE31 X X 

 

No 

Fix 

Data Breakpoint/Single Step on MOV SS/POP SS May Be Lost 
after Entry into SMM 

AE32 X X 

 

No 

Fix 

Code Segment Limit/Canonical Faults on RSM May be Serviced 
before Higher Priority Interrupts/Exceptions and May Push the 
Wrong Address Onto the Stack 

AE33 X   

 

Fixed 

Hardware Prefetch Performance Monitoring Events May Be 
Counted Inaccurately 

AE34 X X 

 

No 

Fix 

Pending x87 FPU Exceptions (#MF) following STI May Be 
Serviced before Higher Priority Interrupts 

AE35 X X 

 

No 

Fix 

Programming the Digital Thermal Sensor (DTS) Threshold May 
Cause Unexpected Thermal Interrupts 

AE36 

X 

 

X 

 Fixed  

CPU_CLK_UNHALTED Performance Monitoring Event (3CH) 
Counts Clocks When the Processor Is in the C1/C2 Processor 
Power States 

AE37 

X 

X 

 

No Fix 

The Processor May Report a #TS Instead of a #GP Fault 

AE38 

X 

X 

 

No Fix 

BTS Message May Be Lost When the STPCLK# Signal Is Active 

AE39 X X 

 

No 

Fix 

Certain Performance Monitoring Counters Related to Bus, L2 
Cache and Power Management Are Inaccurate