Intel 807 AV8062701079702 Data Sheet

Product codes
AV8062701079702
Page of 134
Mode may be used in conjunction with the Adaptive Thermal Monitor. However, if the
system software tries to enable On-Demand mode at the same time the TCC is
engaged, the factory configured duty cycle of the TCC will override the duty cycle
selected by the On-Demand mode. If the I/O-based and MSR-based On-Demand
modes are in conflict, the duty cycle selected by the I/O emulation-based On-Demand
mode will take precedence over the MSR-based On-Demand Mode.
MSR Based On-Demand Mode
If Bit 4 of the IA32_CLOCK_MODULATION MSR is set to a 1, the processor will
immediately reduce its power consumption using modulation of the internal core clock,
independent of the processor temperature. The duty cycle of the clock modulation is
programmable using bits [3:1] of the same IA32_CLOCK_MODULATION MSR. In this
mode, the duty cycle can be programmed in either 12.5% or 6.25% increments
(discoverable using CPUID). Thermal throttling using this method will modulate each
processor core's clock independently.
I/O Emulation-Based On-Demand Mode
I/O emulation-based clock modulation provides legacy support for operating system
software that initiates clock modulation through I/O writes to ACPI defined processor
clock control registers on the chipset (PROC_CNT). Thermal throttling using this
method will modulate all processor cores simultaneously.
Intel
®
 Memory Thermal Management
The processor provides thermal protection for system memory by throttling memory
traffic when using either DIMM modules or a memory down implementation. Two
levels of throttling are supported by the processor – either a warm threshold or hot
threshold that is customizable through memory mapped I/O registers. Throttling
based on the warm threshold should be an intermediate level of throttling. Throttling
based on the hot threshold should be the most severe. The amount of throttling is
dynamically controlled by the processor.
Memory temperature can be acquired through an on-board thermal sensor (TS-on-
Board), retrieved by an embedded controller and reported to the processor through
the PECI 3.0 interface. This methodology is known as PECI injected temperatures and
is a method of Closed Loop Thermal Management (CLTM). CLTM requires the use of a
physical thermal sensor. EXTTS# is another method of CLTM; however, it is only
capable of reporting memory thermal status to the processor. EXTTS# consists of two
GPIO pins on the PCH where the state of the pins is communicated internally to the
processor.
When a physical thermal sensor is not available to report temperature, the processor
supports Open Loop Thermal Management (OLTM) that estimates the power
consumed per rank of the memory using the processor DRAM power meter. A per rank
power is associated with the warm and hot thresholds that, when exceeded, may
trigger memory thermal throttling.
5.6.4.1  
5.6.4.2  
5.6.5  
Thermal Management—Processor
5th Generation Intel
®
 Core
 Processor Family, Intel
®
 Core
 M Processor Family, Mobile Intel
®
 Pentium
®
 Processor Family, and
Mobile Intel
®
 Celeron
®
 Processor Family
March 2015
Datasheet – Volume 1 of 2
Order No.: 330834-004v1
71