Intel E5-1428L CM8062001144000 Data Sheet

DMI_RX_DN[3:0]
DMI_RX_DP[3:0]

DMI2 Receive Data Input

DMI_TX_DP[3:0]
DMI_TX_DN[3:0]

DMI2 Transmit Data Output

QPI{0/1}_CLKRX_DN/DP

Reference Clock Differential Input. These pins provide the PLL reference

clock differential input. 100 MHz typical.

QPI{0/1}_CLKTX_DN/DP

Reference Clock Differential Output. These pins provide the PLL reference

clock differential input. 100 MHz typical.

QPI{0/1}_DRX_DN/DP[19:0]

QPI Receive data input.

QPI{0/1}_DTX_DN/DP[19:0]

QPI Transmit data output.

PECI

PECI (Platform Environment Control Interface) is the serial sideband

interface to the processor and is used primarily for thermal, power and

error management.

BCLK{0/1}_D[N/P]

Reference Clock Differential input.
These pins provide the required reference inputs to various PLLs inside the

processor, such as Intel QPI and PCIe. BCLK0 and BCLK1 run at 100MHz

from the same clock source.

Intel

®

 Xeon

®

 Processor E5-1600 and E5-2600 v3 Product Families, Volume 1 of 2, Electrical

Datasheet

September 2014

52

Order No.: 330783-001