Intel 9550 CM8063101049807 Data Sheet

Product codes
CM8063101049807
Page of 172
Electrical Specifications
54
Intel
®
 Itanium
® 
Processor 9300 Series and 9500 Series Datasheet
2. These outputs can be pulled up to VCCIO or VCC_STDBY on the platform.
3. Pull-up resistance should limit current to 2 mA.
4. Actual V
OH
 and V
OL
 levels are determined by pull-up resistance and supply voltage values.
5. These values are based on 2.2 KΩ pull-up to 3.3 V supply.
Table 2-28.  Voltage Regulator Control Group DC Specification
Symbol
Parameter
Min
Max
Unit
Notes
V
IL
Input Low Voltage
0
(VCCIO*0.67) - 0.2
V
V
IH
Input High Voltage
(VCCIO*0.67) + 0.2
VCCIO
V
V
OH
Output High Voltage
V
1,  2,  3,  4
Notes:
1. Open collector and drain outputs need pull-up resistors on the motherboard.
2. Actual V
OH
 and V
OL
 levels determined by pull-up resistance and supply voltage value. Refer to the Ararat 
Voltage Regulator Module Design Guide or the Ararat II Voltage Regulator Module Design Guide for I
OL 
max.
3. See Intel
®
 Itanium
®
 9300 Series and Intel
®
 Itanium
®
 9500 Series Platform Design Guide for recommended 
resistor values.
4. VR_THERMALERT_N is an input to the top of the package and an output from the bottom of the package. V
IH
 
and V
IL
 levels are for the input at the top of the package, sensed by the processor; V
OH
 and V
OL
 are for the 
output levels on the package pins at the bottom of the package.
V
OL
Output Low Voltage
V
1, 2, 3, 4
Table 2-29. TAP and System Management Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes
V
IL
Input Low Voltage
0
(VCCIO*0.5) - 0.2
V
V
IH
Input High Voltage
(VCCIO*0.5) + 0.2
VCCIO
V
V
OH
Output High Voltage
VCCIO-0.2
VCCIO
V
V
OL
Output Low Voltage
0
0.25
V
1
I
OL
Output Low Current
16
23
mA
1
Notes:
1. With 50 W termination to VCCIO at the far end. 
I
ILeak
Input Leakage Current
–200
200
µA
2,
 
3,
 
4
2. With V at the pin at 1.1 V and 0 V. System designers are advised to check the tolerance of their voltage 
regulator solutions to ensure V at the pin is 1.1 V.
3. Internal weak pull-up included for TCLK.
4. Internal weak pull-up included for TRST_N, TMS and TDI.
I
OLeak
Output Leakage Current
–1000 
200 
µA
Table 2-30. Error, FLASHROM, Power-Up, Setup, and Thermal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes
V
IL
Input Low Voltage
0
(VCCIO*0.67) - 0.2
V
V
IH
Input High Voltage
(VCCIO*0.67) + 0.2
VCCIO
V
V
OH
Output High Voltage
VCCIO-0.2
VCCIO
V
V
OL
Output Low Voltage
0
0.25
V
1
I
OL
Output Low Current
16
23
mA
1
Notes:
1. With 50W termination to VCCIO at the far end. 
I
ILeak
Input Leakage Current
–1000
200
µA
2
I
OLeak
Output Leakage Current
–1000
200
µA