Intel 9550 CM8063101049807 Data Sheet

56

1.

These parameters are based on design characterization and are not tested.

2.

With 50Ω termination to VCCIO at the far end. 

V

IL

Input Low Voltage

0

(VCCIO*0.67) - 0.2

V

V

IH

Input High Voltage

(VCCIO*0.67) + 0.2

VCCIO

V

V

OH

Output High Voltage

VCCIO-0.2

VCCIO

V

V

OL

Output Low Voltage

0

0.35

V

1

I

OL

Output Low Current

13

23

mA

1

1. With 2 parallel 50Ω termination to VCCIO at the far end. 

I

ILeak

Input Leakage Current

–1000

 200

µA

2

2. With input leakage current measured at the pin with 0V and with 1.1V supplied to the pin. System designers

are advised to check the tolerance of their voltage regulator solutions to ensure Vpin of 1.1 V.

I

OLeak

Output Leakage Current

–1000

 200

µA

V

IL

Input Low Voltage

-0.6

Vcc*0.3

2,1

1. V

IL

(min) and V

IH

(max) are reference only and are not tested.

V

IH

Input High Voltage

Vcc*0.7

Vcc +0.5

2,1

V

OL2

Output Low Voltage (I

OL

 

= 2.1 mA)

0.4

2

V

OL1

Output Low Voltage (I

OL

 

= 0.15 mA)

0.2

2

2. Applicable over recommended operating range T = -40 °C to +88 °C; Vcc = +1.7 V to +3.6 V.

I

ILeak

Input Leakage Current

0.1

3.0

2

I

OLeak

Output Leakage Current

0.05

3.0

2