Intel 9560 CM8063101049716 Data Sheet

37

This section defines the high-speed differential point-to-point signaling link for Intel

®

 

SMI for the Intel

®

 Itanium

®

 Processor 9500 Series. The link consists of a transmitter 

and a receiver and the interconnect between them. The specifications described in this 
section covers 6.4 Gb/s operation. The parameters for Intel

®

 SMI at 6.4 GT/s and 

lower are captured in 

 and the PLL specification for transmit and receive are 

captured in 

.

V

Tx-diff-pp-pin

Transmitter differential swing

800

1200

mV

Z

TX_LOW_CM_DC

DC resistance of Tx terminations at half 

the single ended swing (which is usually 

0.25*V

Tx-diff-pp-pin

) bias point

37.4

50

Ω

Z

RX_LOW_CM_DC

DC resistance of Rx terminations at half 

the single ended swing (which is usually 

0.25*V

Tx-diff-pp-pin

) bias point

37.4

50

Ω

V

Tx-diff-pp-CLK-pin

 Transmitter 

differential swing using a CLK 

like pattern

0.9*min(VTx-

diff-pp-pin)

max(VTxdiff

-pp-pin)

mV

1

V

Tx-cm-dc-pin

Transmitter output DC common mode, 

defined as average of V

D+

 and V

D-

0.23

0.27

Fraction of 

V

Tx-diff-pp-

pin

3

V

Tx-cm-ac-pin

Transmitter output AC common mode, 

defined as ((V

D+

 + V

D-

)/2 - V

Tx-cm-dc-pin

)

-0.0375

0.0375

Fraction of 

V

Tx-diff-pp-

pin

TX

duty-UI-pin

This is computed as absolute difference 

between average value of all UI with that 

of average of odd UI, which in magnitude 

would equal absolute difference between 

average of all UI and average of all even 

UI.

0

0.018

UI

TX1UI-Rj-NoXtalk-pin 

Rj value of 1-UI jitter. With X-talk off, but 

on-die system like noise present. This 

extraction is to be done after software 

correction of DCD

0

0.008

UI

2

TX1UI-Dj-NoXtalk--pin

pp Dj value of 1-UI jitter. With X-talk off, 

but on-die system like noise present.

-0.01

0.01

UI

2

TXN-UI-Rj-NoXtalkpin

Rj value of N-UI jitter. With X-talk off, but 

on-die system like noise present. Here 1 

< N < 9.This extraction is to be done 

after software correction of DCD

0

0.012

UI

2

TXN-UI-Dj-NoXtalkpin

pp Dj value of N-UI jitter. With X-talk off, 

but on-die system like noise present. 

Here 1 < N < 9.Dj here indicated Djdd of 

dual-dirac fitting, after software 

correction of DCD

-0.04

0.04

0.2

UI

2

T

Tx-data-clk-skew-pin

Delay of any data lane relative to clock 

lane, as measured at Tx output

-0.5

0.5

UI

T

Rx-data-clk-skew-pin

Delay of any data lane relative to the 

clock lane, as measured at the end of Tx+ 

channel. This parameter is a collective 

sum of effects of data clock mismatches 

in Tx and on the medium connecting Tx 

and Rx.

-1

3.5

UI

V

Rx-CLK

 

Forward CLK Rx input voltage sensitivity 

(differential pp)

150

mV