Intel C2550 FH8065401488912 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

Datasheet, Vol. 2 of 3

September 2014

70

Order Number: 330061-002US

The SoC logs and reports the detected errors via system event generations. In the 

context of global error reporting, a system event is an event that notifies the system of 

the error. See 

PCI Express* error messages are received from downstream devices. The SoC logs 

these errors and other internal errors.

Two types of system events are generated:

• NMI or SMI to the CPU, or
• Error indication through the ERROR2_B, ERROR1_B, and ERROR0_B pins.

The CPU responds to a system event (NMI or SMI) and takes the appropriate action to 

handle the error.

An external agent such as a Baseboard Management Controller (BMC) monitors the 

active low, three error pins to determine the health of the SoC and interrupt the host 

CPU. In some severe error cases, when the CPU is no longer responding to system 

events resulting from an error(s), the three error pins provide a way to notify an 

external agent of the error. The external agent then performs a reset to recover the 

SoC functionality.

Machine check errors (machine check exceptions) and unrecoverable internal errors are 

also reported to the external circuitry through the SoC pins MCERR_B and IERR_B, 

respectively. Refer to 

information about these pins.

CPU

Global Error

Logic

Integrated Endpoint 

Devices, Memory   

Controller, and other 

internal controllers

Integrated PCIe* Root Ports

Baseboard 

Management 

Controller

(BMC)

Messages

ERR_CORR

ERR_NONFATAL

ERR_FATAL

SMI

NMI

ERROR2_B

ERROR1_B

ERROR0_B