Intel C2518 FH8065501516710 Data Sheet

Product codes

FH8065501516710

Intel

Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 2 of 3

Order Number: 330061-002US

149

Volume 2—Thermal Management—C2000 Product Family

Thermal Interrupts and Thresholds

8.5.4

Uncore Programmable Thresholds

For the uncore, the programmable trips are programmed to cause different actions

when triggered to reduce die temperature.

8.5.4.1

Aux3 Trip

By default Aux 3 (Hot Trip) point is set by fuses, but the software/firmware has an

option to set these to a different value.

This trip point is enabled by P-Unit during the M1 stage. The P-unit monitors and

controls the system temperature while the rest of the system is being setup.

8.5.4.2

Aux2, Aux1, Aux0Trip

These are fully programmable trip points for general hardware protection mechanisms.

The programmable trips are only active after the software/firmware enables the trip.

Note:

Unlike Aux 3, the rest of Aux trip registers are default to zero. To prevent spurious

results, the software/firmware programs the trip values before enabling the trip point.

8.5.5

PROCHOT_B

The Core HOT trip and the uncore AUX 3 trip signals are individually sent to P-Unit

code, which internally combines them and drives the appropriate PROCHOT_B signal.

Bi-directional PROCHOT_B allows system assertion of the PROCHOT_B input to trigger

Intel® Thermal Monitor 1 or Intel® Thermal Monitor 2 throttling mechanisms if they

are enabled. One example of bi-directional PROCHOT_B usage is activation of TCC

when a voltage regulator high current condition is detected.

The platform board must ignore this SoC output signal while PMU_PLTRST_B (active-

low SoC output) is asserted.

8.5.6

MEMHOT_B

The platform board must ignore this SoC output signal (MEMHOT_B) while

PMU_PLTRST_B (active-low SoC output) is asserted.

8.5.7

THERMTRIP_N Signal

In the event of a catastrophic cooling failure, the processor automatically shuts down

when the silicon temperature reaches its operating limit. At this point the system bus

signal THERMTRIP_N becomes active and power must be removed from the processor.

The THERMTRIP_N activation is independent of the processor activity and does not

generate any bus cycles. Refer to the Intel® Atom™ Processor C2000 Product Family

Thermal and Mechanical Specifications and Design Guidelines for additional details.

The temperature when the THERMTRIP_N signal becomes active is individually

calibrated during manufacturing. The temperature at which THERMTRIP_N becomes

active is roughly parallel to the thermal profile and greater than the PROCHOT_B

activation temperature. Once configured, the temperature at which the THERMTRIP_N

signal is asserted is neither re-configurable nor accessible to the system.

The platform board must ignore this SoC output signal while PMU_PLTRST_B (active-

low SoC output) is asserted. At the time that THERMTRIP_N is asserted, the system

automatically begins shutdown of the system. The period of THERMTRIP_N assertion is

around 200 ns, but the duration is not guaranteed.