Intel C2518 FH8065501516710 Data Sheet

Product codes
FH8065501516710
Page of 746
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
151
Volume 2—Thermal Management—C2000 Product Family
Memory Thermal Control
8.7
Memory Thermal Control
Two mechanisms for managing memory temperatures are available: the memory 
bandwidth counter and the memory module temperature monitoring. Since the SoC 
has no mechanism to determine the temperature of the memory modules, the BMC, or 
other platform-board external circuitry, is needed to provide this information via PECI 
over the SMBus. 
8.7.1
Memory Bandwidth Counter 
Memory event based bandwidth throttling is available as a fallback thermal protection 
feature if external thermal sensors are not available. Memory reads and writes are 
counted and compared to a threshold trip point to reduce memory bandwidth when 
needed to reduce memory module temperatures. These counter-based trip points are 
enabled using the thermal management control registers.
8.7.2
Memory Temperature Monitoring
Open Loop Thermal Throttling (OLTT) and Closed Loop Thermal Throttling (CLTT) pass-
through is supported on the SoC to help optimize platform power/acoustics. The SoC 
supports DDR3 DRAM technology. The temperature sensor on DIMM (TSOD) is required 
for CLTT. OLTT is also supported. The
 
implementations of memory thermal throttling 
are defined as follows:
1. Open Loop Thermal Throttling: The system does not change any of the control 
registers in the memory controller during runtime. OLTT control registers are 
configured by BIOS MRC and remain fixed after post.
2. Closed Loop Thermal Throttling (pass-through): The system does not change any 
of the control registers in the memory controller during runtime. CLTT pass-through 
control registers are configured by BIOS MRC and firmware and remain fixed after 
post. The memory controller does not poll the DIMMs directly, so this mode still 
requires PECI over SMBus pass-through mode as described below.
a. PECI over SMBus pass-through: There is a PCU pass-through feature in which 
the BMC or other external controller can write temperature data to the PCU using 
PECI for platforms where the TSOD is not available.
b. The following temperature ranges are defined for the CLTT pass-through 
Memory throttling:
— 82 °C - Unconstrained performance, set throttling to peak.
— 93 °C - Set throttling to 10% of peak.
— 100 °C - Set throttling to 1% of peak to attempt to prevent system shutdown.
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