Intel C2518 FH8065501516710 Data Sheet

Product codes
FH8065501516710
Page of 746
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
177
Volume 2—System Address Maps—C2000 Product Family
Physical Address Space Map
10.1.2
I/O Fabric (MMIO) Map
Memory accesses targeting MMIO are routed by the I/O fabric to programmed PCI 
ranges, or routed to the PCU by default (subtractive agent). Programmed PCI ranges 
are moved within low or high MMIO, and most are disabled. Not all devices are 
mapped to high MMIO.
Fixed MMIO is claimed by the Platform Control Unit (PCU). The default regions are 
listed in 
. The variable (movable) ranges are shown in 
.
Table 10-1. Internal Devices with Fixed MMIO Addresses
Range Name
Start Address
End Address
Comments
ABORT
FEB0_0000
FEBF_FFFF
Abort Page Region
I/O APIC
FEC0_0000
FEC0_0040
I/O APIC space
HPET
FED0_0000
FED0_03FF
High Performance Event Timer
TPM1.2 (LPC)
FED4_0000
FED4_0FFF
TPM1.2
Local APIC
FEE0_0000
FEEF_FFFF
APIC sends MSIs to CPU and INTR ACKs to 
Legacy Block interrupt controllers.
LPC
FF00_0000
FF0F_FFFF
BDE.E40
1
LPC
FF10_0000
FF1F_FFFF
BDE.E50
LPC
FF20_0000
FF2F_FFFF
BDE.E60
LPC
FF30_0000
FF3F_FFFF
BDE.E70
LPC/SPI
FF40_0000
FF4F_FFFF
BDE.E40
LPC/SPI
FF50_0000
FF5F_FFFF
BDE.E50
LPC/SPI
FF60_0000
FF6F_FFFF
BDE.E60
LPC/SPI
FF70_0000
FF7F_FFFF
BDE.E70
LPC
FF80_0000
FF87_FFFF
BDE.EC0
LPC
FF88_0000
FF8F_FFFF
BDE.EC8
LPC
FF90_0000
FF97_FFFF
BDE.ED0
LPC
FF98_0000
FF9F_FFFF
BDE.ED8
LPC
FFA0_0000
FFA7_FFFF
BDE.EE0
LPC
FFA8_0000
FFAF_FFFF
BDE.EE8
LPC
FFB0_0000
FFB7_FFFF
BDE.EF0
LPC
FFB8_0000
FFBF_FFFF
BDE.EF8
LPC/SPI
FFC0_0000
FFC7_FFFF
BDE.EC0
LPC/SPI
FFC8_0000
FFCF_FFFF
BDE.EC8
LPC/SPI
FFD0_0000
FFD7_FFFF
BDE.ED0
LPC/SPI
FFD8_0000
FFDF_FFFF
BDE.ED8
LPC/SPI
FFE0_0000
FFE7_FFFF
BDE.EE0
LPC/SPI
FFE8_0000
FFEF_FFFF
BDE.EE8
LPC/SPI
FFF0_0000
FFF7_FFFF
BDE.EF0
LPC/SPI
FFF8_0000
FFFF_FFFF
BDE.EF8