Intel C2518 FH8065501516710 Data Sheet

Product codes
FH8065501516710
Page of 746
Volume 2—Gigabit Ethernet (GbE) Controller—C2000 Product Family
Architectural Overview
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 2 of 3
September 2014
202
Order Number: 330061-002US
11.5.9
LED Interface
The GbE controller provides four output drivers intended for driving external LED 
circuits. Each of the four LED outputs can be individually configured to select the 
particular event, state, or activity, which is indicated on that output. In addition, each 
LED can be individually configured for output polarity as well as for blinking versus non-
blinking (steady-state) indication.
The configuration for LED outputs is specified via the read/write LED Control (LEDCTL) 
Register, located in Memory-Mapped I/O (MMIO) at offset E00h. LEDCTL controls the 
setup of the internal signals routed to the external LEDs according to the GbE LEDs Mux 
Control (LEDS_MUX_CTRL) Register located in (MMIO) at offset 8130h.
Furthermore, the hardware-default configuration for all the LED outputs, can be 
specified via EEPROM fields, thereby supporting LED displays configurable to a 
particular OEM preference. There are two 16-bit words in EEPROM for each LAN Port 0, 
1, 2, and 3:
 - 16-bit Word offset 1Fh
 - 16-bit Word offset 1Ch
The offset values mentioned above are from the EEPROM 16-bit word base address for 
a particular LAN Port. The four base address values, 0h, 80h, C0h, and 100h, are 
shown in 
.
Using the LEDCTL register in MMIO, each of the four LEDs can be configured to use one 
of a variety of sources for output indication. The “Mode” fields of the LEDCTL register 
control the LED source. The “Invert” bits allow the LED source to be inverted before 
being output to the LED or observed by the blink-control logic. LED outputs are 
assumed to normally be connected to the negative side (cathode) of an external LED. 
The LEDCTL “Blink” BLINK bits control whether the LED should be blinked (on for 200 
ms, then off for 200 ms) while the LED source is asserted. The blink control might be 
especially useful for ensuring that certain events, such as ACTIVITY indication, cause 
LED transitions that are visible to the human eye.
Note:
When LED Blink mode is enabled, the appropriate LED Invert bit should be set to 0b. 
The LINK/ACTIVITY source functions slightly different from the others when BLINK is 
enabled. The LED is off if there is no LINK, on if there is LINK and no ACTIVITY, and 
blinking if there is LINK and ACTIVITY.
The dynamic LED modes (FILTER_ACTIVITY, LINK/ACTIVITY, COLLISION, ACTIVITY, 
PAUSED) should be used with LED Blink mode enabled.
For addition information concerning the LEDCTL register, LEDS_MUX_CTRL register, the 
EEPROM registers, and LED control, refer to the Intel
®
 Atom™ Processor C2000 
Product Family Integrated GbE Controller Programmer’s Reference Manual (PRM).
Electrical and timing specifications are in 
. Board design guidelines are given in the Intel
®
 
Atom™ Processor C2000 Product Family Platform Design Guide (PDG).