Intel C2518 FH8065501516710 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

Datasheet, Vol. 2 of 3

September 2014

220

Order Number: 330061-002US

See 

 for additional details.

The signal description table has the following headings:

• Signal Name: The signal/pin name 
• Direction: The buffer direction is either input, output, or I/O (bi-directional)
• Type: The buffer type
• Description: A brief explanation of the signal function

PMC_WAKE_PCIE# is not listed, but is used by PCI Express* devices. See 

 for details.

O

PCIe*

PCI Express* Transmit
PCI Express Ports 3:0 transmit pair (P and N) signals. Each pair 

makes up the transmit half of the lane.

I

PCIe

PCI Express Receive
PCI Express Ports 3:0 receive pair (P and N) signals. Each pair makes 

up the receive half of the lane.

I

Differential

PCI Express Input Clock
100 MHz differential clock signal.

I

PCIe

PCI Express Wake#
This signal is muxed with GPIO_SUS8.

O

PCIe

Two, single-ended, flexible, general-purpose clock outputs. Each is 

default-set to 25 MHz and can be programmed to be 33 MHz or 

disabled using the CCU Dividers Control Register (DIV_CTRL) located 

at sideband register Port 40h, offset 0Ch. These signal pins are also 

used as functional strapping pins during power-up reset. They are 

used to determine the boot block source (SPI or LPC interface).
These signals are muxed and is used by other functions.