Intel C2518 FH8065501516710 Data Sheet

Product codes
FH8065501516710
Page of 746
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
251
Volume 2—SATA Controllers (SATA2, SATA3)—C2000 Product Family
Features
13.2.5
Power Management Operation
Power management of the SATA controller and ports covers operations of the host 
controller and the SATA wire.
13.2.5.1
Power State Mappings
The D0 PCI power management state for device is supported by the SATA controller.
SATA devices also have multiple power states. From parallel ATA, three device states 
are supported through ACPI. They are:
• D0 – Device is working and instantly available. 
• D1 – Device enters when receiving a STANDBY IMMEDIATE command. Exit latency 
from this state is in seconds.
• D3 – From the SATA device perspective, no different than a D1 state, in that it is 
entered using the STANDBY IMMEDIATE command. However, an ACPI method is 
also called which resets the device and then cut its power.
These device states are subsets of the host controller D0 state. 
Finally, SATA defines three PHY layer power states, which have no equivalent mappings 
to parallel ATA. They are:
• PHY READY – PHY logic and PLL are both on and active. 
• Partial – PHY logic is powered, but in a reduced state. Exit latency is no longer 
than 10 ns. 
• Slumber – PHY logic is powered, but in a reduced state. Exit latency is up to 
10 ms. 
Since these states have much lower exit latency than the ACPI D1 and D3 states, the 
SATA controller defines these states as sub-states of the device D0 state.
13.2.5.2
Power State Transitions
13.2.5.2.1
Partial and Slumber State Entry/Exit
The partial and slumber states save interface power when the interface is idle. It is 
most analogous to PCI CLKRUN# (in power savings, not in mechanism), where the 
interface has power saved while no commands are pending. The SATA controller 
defines PHY layer-power management (as performed using primitives) as a driver 
operation from the host side, and a device proprietary mechanism on the device side. 
The SATA controller accepts device transition types, but does not issue any transitions 
as a host. All received requests from a SATA device are ACKed.
When an operation is performed to the SATA controller and needs to use the SATA 
cable, the controller must check whether the link is in the partial or slumber states, and 
if so, must issue a COM_WAKE to bring the link back online. Similarly, the SATA device 
must perform the same action.
13.2.5.2.2
Device D1, D3 States
These states are entered after some period of time when the software has determined 
that no commands are sent to this device for some time. The mechanism for putting a 
device in these states does not involve any work on the host controller, other then 
sending commands over the interface to the device. The command most likely to be 
used in ATA/ATAPI is the STANDBY IMMEDIATE command.