Intel C2518 FH8065501516710 Data Sheet

Product codes
FH8065501516710
Page of 746
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
377
Volume 2—SMBus 2.0 Unit 2 - PECI—C2000 Product Family
17
SMBus 2.0 Unit 2 - PECI
The Platform Environment Control Interface (PECI) was developed to replace I
2
C as the 
methodology of reading CPU temperatures. The PECI specification has evolved 
overtime to provide a broader management interface to manage the platform. The 
current PECI specification is RS - Platform Environment Control Interface (PECI) 
Specification, Revision 3.0. In non-SoC environments, the PECI slave interface is 
implemented in the CPU complex, while the master interface is in the Platform Control 
Hub (PCH) and/or Base Board Management Controller (BMC). The PECI implementation 
only allows a single master on the bus.
On the SoC platform, the BMC acts as a PECI master and the SoC SMBus-for-PECI 
controller described in this chapter acts as a slave PECI proxy controller. The PECI 
commands are encapsulated within SMBus packets sent to the SoC. Additional, new 
PECI commands have been defined for the SoC, specific to its architecture.
Figure 17-1. SMBus PECI Covered in This Chapter
Table 17-1. References
Reference
Revision
Date
Document Title
SMBus
2.0
August 3, 2000
System Management Bus (SMBus) Specification,
 Version 2.0
PECI 3.0
Specification 
31631
3.0
Mar. 15, 2012
RS - Platform Environment Control Interface (PECI) 
Specification, 
Revision 3.0
I
O
SMBus2
PECI
I
O