Intel C2518 FH8065501516710 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 2 of 3

Order Number: 330061-002US

455

The following legacy timers are supported:

• 24-Bit ACPI Timer – Clocked with a 3.579545-MHz signal derived from the 

14.31818-MHz clock. It is enabled by the PMC microprocessor code and is always 

running. If it expires, an SMI is generated.

• Periodic SMI Timer – Programmed by the operating system to generate an SMI 

• Software SMI (SWSMI) Timer – Programmed by the operating system. When it 

expires, the timer counter stops counting and an SMI is generated.

• TCO  Watchdog  Timer

Power management is performed primarily by the integrated PMC microprocessor. Its 

code originates from the platform Flash Memory device that is typically used to store 

the BIOS. This code is also referred to as the power management firmware. The SoC 

has secure methods of transferring this code to the PMC microprocessor internal RAM. 

The RAM is also initialized through various debug tools for troubleshooting.

The PMC microprocessor has code stored in its ROM and is able to function even if its 

integrated RAM is not loaded.

The SoC has various mechanisms to allow the PMC microprocessor patch code to be 

authenticated and integrated in the RAM.

When Suspend (SUS) power is active, the internal PMC microprocessor is made active 

when one of the following happens:

• The power button is pressed.
• An RTC walk-up event occurs.
• The AFTERG3_EN register bit is set in the RTC power well.

The AFTERG3_EN bit, also called AG3E, tells the system whether to boot all the way 

from the G3 to S0 state or whether to stop in S5 and wait for a wake event before 

making a transition to the S0 state and booting the system.