Intel C2518 FH8065501516710 Data Sheet
Product codes
FH8065501516710
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
453
Volume 2—Power Management Controller (PMC)—C2000 Product Family
Architectural Overview
19.3.4
CPU INIT#, SMI and Reset Generation
See
for the list of registers used to generate resets, a System Management
Interrupt (SMI), and the Internal Initialization (INIT#) signal.
Ports B2h and B3h are 8-bit, read/write scratchpad registers.
The following actions send an INIT# signal to the CPU:
• An I/O write to PORTCF9 where the port SYS_RST (bit 1) was a 0 and RST_CPU
(bit 2) transitions from 0 to 1.
• A shutdown special cycle from the CPU. Here the INIT# assertion is based on the
value of the Shutdown Policy Select (SPS) register.
When the internal INIT# is asserted, it resets the integer registers inside the CPU cores
without affecting its internal caches or floating-point registers. The cores then begin
execution at the power-on reset vector configured during the power-on configuration.
Table 19-8. PMC ACPI Registers in Fixed I⁄O Space
I/O
Address
(Fixed)
Name
Description
0x00B2
PORTB2
APM Control Register (8-bit read/write scratchpad register).
A write also initiates an SMI if enabled.
0x00B3
PORTB3
8-bit read/write scratchpad register.
0x0092
Forces the Initialization (INIT#) signal to the CPU.
0x0CF9
Reset Control register for system and CPU resets.