Intel C2518 FH8065501516710 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 2 of 3

Order Number: 330061-002US

495

Once the start frame has been initiated, the SERIRQ peripherals start counting frames 

based on the rising edge of 

. Each of the IRQ DATA frames consists of 

exactly three phases. Each phase is one LPC clock period:

• Sample Phase - During this phase, a device drives 

 low if its 

corresponding interrupt signal is low. If its corresponding interrupt is high, then the 

 device tri-states the 

 line (lets it float). 

remains high due to the pull-up resistors required on the platform board.

• Recovery Phase - During this phase, a peripheral device drives 

 high if 

it was driven low during the sample phase. If it was not driven during the sample 

phase, it remains tri-stated in this phase.

• Turn-around Phase - The device tri-states 

After the data frames, a stop frame is driven by the serialized interrupt controller. 

Four interrupts are on the serial stream which are not supported by the serialized 

interrupt controller:

• IRQ0: heartbeat interrupt generated by counter 0 of the internal 8254 

Programmable Interval Timer (PIT).

• IRQ8#: the Real Time Clock (RTC) interrupt is only generated internally.
• IRQ13: this interrupt indicates floating point error and is not supported.
• IRQ14: this interrupt is only generated by the Serial ATA (SATA) controller in SATA 

legacy mode.

The serialized interrupt controller ignores the states of these interrupts if detected in 

the IRQ data stream.

Two LPC clocks

Quiet Mode - Indicating that any SERIRQ device may initiate a start frame.

Three LPC clocks

Continuous Mode - Only the interrupt controller may initiate a start frame.