Intel C2518 FH8065501516710 Data Sheet

Product codes
FH8065501516710
Page of 746
Volume 2—Low Pin Count (LPC) Controller—C2000 Product Family
Architectural Overview
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 2 of 3
September 2014
502
Order Number: 330061-002US
24.2
Architectural Overview
The LPC serves as a PCI-to-ISA bridge to a number of legacy ISA devices integrated in 
the SoC and to the external LPC-1.1-compliant devices connected to the LPC interface 
pins. The bridge is discovered by the software at bus 0, device 31 (decimal), function 0.
The SoC can boot the system BIOS and the system firmware through the LPC bus or 
through the Serial Peripheral Interface (SPI). The software selects which of these two 
BIOS/firmware boot sources to use. The BIOS Soft-Strap register (RCBA+00h[11:10]) 
must be set to 11b (default) to boot from SPI or 00b to boot from the LPC. This is 
The LPC interface is used for connection of various legacy components.
24.2.1
No DMA or PHOLD Support
The SoC does not support bus-mastering devices on the LPC interface. Such devices 
are bi-directional parallel ports, IR controllers, and floppy drive controllers. The LPC 
does support DMA and what is known as PHOLD, the mechanism for an ISA device to 
lock the system so that it performs DMA. Super I/O devices that depend on DMA are 
not supported. If one of these devices is connected to the LPC and a PHOLD is 
requested, the SoC drops the request, sets an error bit, and the system hangs 
immediately.
This does not impact other legacy devices such as serial ports, keyboard/mouse, and 
USB-based peripherals.