Intel C2518 FH8065501516710 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

Datasheet, Vol. 2 of 3

September 2014

530

Order Number: 330061-002US

The 8254 Programmable Interval Timer (PIT) contains three counters which have fixed 

uses. All registers and functions associated with the 8254 timers are in the core power 

well and are clocked by the SoC 14.31818-MHz clock.

This clock is divided by 12 internally to generate the 1.193182-MHz (838-ns period) 

reference clock used by the three counters.

The PIT is accessed through a set of four registers located in the I/O space.

• One 8-bit 8254 Timer Control Word Register
• Three 8-bit Counter Access Ports, one for each counter

They are accessed in the I/O space and have been assigned the 16-bit I/O addresses of 

0x40 through 0x43.

Also associated with the integrated 8254 are 4 bits of the 8-bit NMI Status and Control 

) register at address 0x61 in the I/O space.

• Read Back command
• Counter Latch command

This command determines the count value, programmed mode, and current states of 

the OUT pin and null count flag of the selected counter or counters. Status and/or 

count are latched in any or all of the counters by selecting the counter during the 

register write. The count and status remain latched until read, and further latch 

commands are ignored until the count is read.

Both count and status of the selected counters are latched simultaneously by setting 

both bit 5 and bit 4 to 0. If both are latched, the first read operation from that counter 

returns the latched status. The next one or two reads, depending on whether the 

counter is programmed for 1- or 2-byte counts, returns the latched count. 

See 

 for additional 

programming information.