Intel C2518 FH8065501516710 Data Sheet

Product codes
FH8065501516710
Page of 746
Volume 2—Memory Controller—C2000 Product Family
RAS Features
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 2 of 3
September 2014
60
Order Number: 330061-002US
3.4
RAS Features
3.4.1
Data Parity Protection
The write and read data to and from the integrated memory controller (the internal unit 
in SSA handles I/O requests from the core and other bus agents, like SATA) are 
protected by even parity on each byte lane. Parity per byte lane is used since the 
internal data buffers contain byte write enables to support partial writes from the 
requesting agents.
3.4.2
Memory Controller Error Correcting Codes (ECC)
The DDR3 interface is protected by an ECC code for Single-Bit Error Correction (SEC) 
and Double-Bit Error Detection (DED). An 8-bit ECC code word is stored with every 
8 bytes of data, which can protect a 128-bit wide interface. Since the data width is only 
72 bits, 56 single-bit error syndrome codes are available. 
Note:
An ECC DIMM only provides additional storage for redundant information, the actual 
error detection/correction takes place within the SoC memory controller.
One of these single-bit error syndrome codes converts from byte parity to the 8-byte 
ECC. When the write data ECC is generated, the parity is checked on all 8-byte lanes 
and the parity error signal generates the ECC. When checking ECC on a read, the check 
is performed assuming that the SoC D-Unit has no write data parity errors. Any 
uncorrectable error syndrome that is detected on a read results in the generation of 
bad parity for all 8-byte lanes.
When a word is written into ECC protected memory, the ECC bits are computed by a set 
of exclusive OR trees. When the word is read back, the exclusive OR trees use the data 
read from the memory to recompute the ECC. The recomputed ECC is compared to the 
ECC bits read from the memory. Any discrepancy indicates an error. By looking at which 
ECC bits do not match, identify which data or ECC bit is in error, or whether a double-
bit error occurred. The result of this ECC calculation is called the syndrome. If the 
syndrome is zero, no error occurred. If the syndrome is non-zero, the syndrome is used 
 to determine which bits are in error, or if the error is uncorrectable.