Intel C2518 FH8065501516710 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

Datasheet, Vol. 3 of 3

September 2014

610

Order Number: 330061-002US

TCK

I

CMOS_V1P0

1

2K, PD

51, EXT 

PD

V1P0A

JTAG Test Clock for the JTAG 

controller.

TRST_B

I

CMOS_V1P0

1

2K, PU

V1P0A

JTAG Reset. Resets the JTAG 

controller when asserted. The 

signal has an internal pull-up 

resistor to comply with 

1149.1. An external 51-Ω 1% 

pull-down resistor is required 

to disable JTAG and keep TAP 

in safe mode.

TMS

I

CMOS_V1P0

1

2K, PU

51, EXT 

PD

V1P0A

JTAG Test Mode Select. 

Selects the state of the JTAG 

controller. Sampled with the 

rising edge of JTCK.

TDI

I

CMOS_V1P0

1

2K, PU

V1P0A

JTAG Test Data In. Sampled 

with the rising edge of JTCK.

TDO

O

CMOS_V1P0

1

51, EXT 

PU

V1P0A

JTAG Test Data Out.

CX_PRDY_B

O, OD

CMOS_V1P0

1

2K, PU

V1P0S

Probe Mode Ready: CPU 

response to XXPREQ_B 

assertion. Indicates CPU is in 

probe mode. Input unused. 

CX_PREQ_B

I

CMOS_V1P0

1

2K, PU

V1P0S

Probe Mode Request: 

Assertion is a request for the 

CPU to enter probe mode. The 

CPU responds with XXPRDY_B 

assertion once it has entered. 

The XXPREQ_B can be 

enabled to cause the CPU to 

break from C6. External 56 Ω 

resistor to Vccp.

TOTAL

7