Intel C2518 FH8065501516710 Data Sheet
Product codes
FH8065501516710
Volume 3—Signal Names and Descriptions—C2000 Product Family
Signal Pins with Shared Functions or GPIO
Intel
®
Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 3 of 3
September 2014
612
Order Number: 330061-002US
31.21
Signal Pins with Shared Functions or GPIO
The following lists of signal pins/balls have shared functions. The shared functions can
be in the form of a hard-strap pin that is sampled at reset time, (see
), one or two normal functions that need some kind of attention
to configure, or a Customer General-Purpose I/O (GPIO) signal if the normal
function(s) is not needed.
is the list for signal pins in the SoC Core Power Well, and
Table 31-24. Signal Pins with Shared Functions - Core Power Well (Sheet 1 of 3)
SoC Signal Pin Name
Functional Options
and Occurrences
SoC Signal Represented by
Pin
Direction
(I/O)
Internal
Pull-up (PU)
or
Pull-down (PD)
Power
Rail
NMI
As BIOS Starts
NMI
I
20K PD
V3P3S
SC_USE_SEL = 1
GPIOS_0
Set by the
Software
(SW)
TBD
V3P3S
ERROR2_B
Strap Sampling
Strap: Reserved for Intel
I
20K PD
V3P3S
As BIOS Starts
ERROR2_B
O
None
V3P3S
SC_USE_SEL = 1
GPIOS_1
Set by SW
TBD
V3P3S
ERROR1_B
Strap Sampling
Strap: Reserved for Intel
I
20K PD
V3P3S
As BIOS Starts
ERROR1_B
O
None
V3P3S
SC_USE_SEL = 1
GPIOS_2
Set by SW
TBD
V3P3S
ERROR0_B
Strap Sampling
Strap: Reserved for Intel
I
20K PD
V3P3S
As BIOS Starts
ERROR0_B
O
None
V3P3S
SC_USE_SEL = 1
GPIOS_3
Set by SW
TBD
V3P3S
IERR_B
As BIOS Starts
IERR_B
O
None
V3P3S
SC_USE_SEL = 1
GPIOS_4
Set by SW
TBD
V3P3S
MCERR_B
As BIOS Starts
MCERR_B
O
None
V3P3S
SC_USE_SEL = 1
GPIOS_5
Set by SW
TBD
V3P3S
UART1_RXD
As BIOS Starts
UART1_RXD
I
20K PD
V3P3S
SC_USE_SEL = 1
GPIOS_6
Set by SW
TBD
V3P3S
UART1_TXD
Strap Sampling
0 = Override SPI Flash
Descriptor Security
I
20K PU
V3P3S
As BIOS Starts
UART1_TXD
O
None
V3P3S
SC_USE_SEL = 1
GPIOS_7
Set by SW
TBD
V3P3S
SMB_CLK0
As BIOS Starts
SMB_CLK0
I/O, OD
20K PU
V3P3S
SC_USE_SEL = 1
GPIOS_8
Set by SW
TBD
V3P3S
SMB_DATA0
As BIOS Starts
SMB_DATA0
I/O, OD
20K PU
V3P3S
SC_USE_SEL = 1
GPIOS_9
Set by SW
TBD
V3P3S
SMBALRT_N0
As BIOS Starts
SMBALRT_N0
I/O, OD
20K PU
V3P3S
SC_USE_SEL = 1
GPIOS_10
Set by SW
TBD
V3P3S
SMB_DATA1
As BIOS Starts
SMB_DATA1
I/O, OD
20K PU
V3P3S
SC_USE_SEL = 1
GPIOS_11
Set by SW
TBD
V3P3S