Intel C2518 FH8065501516710 Data Sheet

Product codes
FH8065501516710
Page of 746
Volume 3—Signal Electrical and Timing Characteristics—C2000 Product Family
SoC JTAG and Debug Interfaces
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 3 of 3
September 2014
684
Order Number: 330061-002US
33.23
SoC JTAG and Debug Interfaces
33.23.1
DC Specifications
 contain the DC specifications for the JTAG and Debug signals. 
These signals are in the 1.0-Volt SUS power well of the SoC.
• TCK (Input)
• TDI (Input)
• TMS (Input)
• TRST_B (Input)
Notes:
1.
V
IH
 is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high 
value.
2.
V
IL
 is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical low 
value.
3.
Measured at V1P0A ÷ 2.
4.
Rwpu_40k and Rwpd_40k are only used for TRST_B.
Notes:
1.
Minimum V
OH
 depends on the pull-down resistance on the system.
2.
Maximum V
OL
 depends on the pull-up resistance on the system.
3.
Measured at V1P0A ÷ 2.
Table 33-46. TAP and Debug Input Signal DC Specifications
Symbol
Parameter
Min
Max
Units
Notes
V
IH
Input High Voltage
0.85*V1P0A
V
1
V
IL
Input Low Voltage
0.35*V1P0A
V
2
Z
pu
Pull up Impedance
60
Ω
3
Z
pd
Pull down Impedance
60
Ω
3
R
wpu
Weak Pull Impedance
1
4
3
R
wpd
Weak Pull Down Impedance
1
4
3
R
wpu-40K
Weak Pull Up Impedance 
40K
20
70
4
R
wpd-40K
Weak Pull Down Impedance 
40K
20
70
4
Table 33-47. TAP and Debug Output Signal DC Specifications
Symbol
Parameter
Min
Max
Units
Notes
V
OH
Output High Voltage
1.05
V
1
V
OL
Output Low Voltage
0
V
2
R
ON
Buffer Resistance
25
30
Ω
3
R
wpu
Weak Pull Impedance
1
4
3
R
wpd
Weak Pull Down Impedance
1
4
3