Intel C2350 FH8065401488914 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

Datasheet, Vol. 3 of 3

September 2014

576

Order Number: 330061-002US

DDR3_0_CKE[3:0]

O

DDR

4

VDDQ

DDR3 Clock Enable: (active 

high). CKE is used for power 

control of the DRAM devices. 

For the DRAM Devices: CKE 

HIGH activates, and CKE LOW 

deactivates, internal clock 

signals and device input 

buffers and output drivers. 

Taking CKE LOW provides Pre-

charge Power Down and Self-

Refresh operation (all banks 

idle) or Active Power Down 

(row Active in any bank). CKE 

is synchronous for a power 

down entry and exit, and for 

self-refresh entry. CKE is 

asynchronous for self-refresh 

exit. After VREF has become 

stable during the power-on 

and initialization sequence, it 

must be maintained for proper 

operation of the CKE receiver. 

For proper self-refresh entry 

and exit, VREF must be 

maintained to this input. CKE 

must be maintained HIGH 

throughout read and write 

accesses. Input buffers, 

excluding CK, CKB, ODT, and 

CKE are disabled during 

power down. Input buffers, 

excluding CKE, are disabled 

during self-refresh.

DDR3_0_CSB[3:0]

O

DDR

4

VDDQ

DDR3 Chip Select: (active 

low). These signals determine 

whether a command is valid in 

a given cycle for the devices 

connected to it. All commands 

are masked when CSB is 

registered HIGH. CSB 

provides for external Rank 

selection on systems with 

multiple Ranks. CSB is 

considered part of the 

command code.