Intel C2350 FH8065401488914 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 2 of 3

Order Number: 330061-002US

79

This is a 64-bit register with read/write, zero-to-clear, sticky access. The 

IA32_MC0_STATUS register follows the descriptions shown for IA32_MCi_STATUS in 

Volume 3, Chapter 15 of the Intel

Manual:

• Bit 63 = VAL - IA32_MC0_STATUS register valid.
• Bit 62 = OVER - Error overflow.
• Bit 61 = UC - Uncorrected error. See 

• Bit 60 = EN - Error reporting enabled.
• Bit 59 = MISCV - IA32_MC0_MISC register valid. This is always 0.
• Bit 58 = ADDRV - IA32_MC0_ADDR register valid. See 

• Bit 57 = PCC - Processor context corrupted. See 

• Bits [56:53] = Reserved.
• Bits [52:38] = Other Information (IA32_MCG_CAP bit 10 is 0) - For the SoC, this 

bit field contains Intel-internal information. See the additional Other Information 

bit field below.

• Bits [37:32] = Other Information - For the SoC, this bit field contains Intel-internal 

information.

• Bits [31:16] = MSCOD Model-Specific Error Code - For the SoC, this bit field 

contains Intel-internal information.

• Bits [15:0] are the MCA Error Code for the BIU bank MC0. See 

. Refer to 

Section 15.9 of the Intel

 64 and IA-32 Architectures Software Developer’s Manual 

for information about interpreting the Simple and Compound MCA Error codes.

0x0003

Simple

External Error

0

0

0

0x0400

Simple

Internal Timer Error

1

0

1

0x0410

Simple

Internal Unclassified Error

1

Varies

1

0x0420

Simple

Internal Unclassified Error

1

0

1

0x0810

Compound

Bus/Interconnect Error

1

Varies

1

0x0820

Compound

Bus/Interconnect Error

1

Varies

1