Intel E3845 FH8065301487715 Data Sheet
Product codes
FH8065301487715
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
3601
20:19
0h
RO
M3_HDATA_WIDTH:
The value of this register is derived from the
DMAH_M3_HDATA_WIDTH coreConsultant parameter. For a description of this
parameter, refer to page 105.
•
•
0h = 32 bits
•
1h = 64 bits
•
2h = 128 bits
•
3h = 256 bits
18:17
0h
RO
M2_HDATA_WIDTH:
The value of this register is derived from the
DMAH_M2_HDATA_WIDTH coreConsultant parameter. For a description of this
parameter, refer to page 105.
•
•
0h = 32 bits
•
1h = 64 bits
•
2h = 128 bits
•
3h = 256 bits
16:15
0h
RO
M1_HDATA_WIDTH:
The value of this register is derived from the
DMAH_M1_HDATA_WIDTH coreConsultant parameter. For a description of this
parameter, refer to page 105.
•
•
0h = 32 bits
•
1h = 64 bits
•
2h = 128 bits
•
3h = 256 bits
14:13
0h
RO
S_HDATA_WIDTH:
The value of this register is derived from the
DMAH_S_HDATA_WIDTH coreConsultant parameter. For a description of this parameter,
refer to page 105.
•
•
0h = 32 bits
•
1h = 64 bits
•
2h = 128 bits
•
3h = 256 bits
12:11
01h
RO
NUM_MASTER_INT:
The value of this register is derived from the
DMAH_NUM_MASTER_INT coreConsultant parameter. For a description of this
parameter, refer to page 102. 0h = 1 to 3h = 4
10:8
7h
RO
NUM_CHANNELS:
The value of this register is derived from the
DMAH_NUM_CHANNELS coreConsultant parameter. For a description of this parameter,
refer to page 102. 0h = 1 to 7h = 8
7:4
0h
RW
Undefined0:
Reserved.
3
0h
RO
MABRST:
The value of this register is derived from the DMAH_MABRST coreConsultant
parameter. For a description of this parameter, refer to page 103.
•
•
0 = FALSE
•
1 = TRUE
2:1
2h
RO
INTR_IO:
The value of this register is derived from the DMAH_INTR_IO coreConsultant
parameter. For a description of this parameter, refer to page 103.
•
•
0h = ALL
•
1h = TYPE
•
2h = COMBINED
•
3h = reserved
0
0h
RO
BIG_ENDIAN:
The value of this register is derived from the DMAH_BIG_ENDIAN
coreConsultant parameter. For a description of this parameter, refer to page 104.
•
•
0 = FALSE
•
1 = TRUE
Bit
Range
Default &
Access
Field Name (ID): Description