Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
4081
26.16.10 Interrupt Register (INTERRUPTREG)—Offset 3Ch
Access Method
Default: 00000100h
26.16.11 PowerManagement Capability ID (POWERCAPID)—Offset 80h
Access Method
Default: 00030001h
Type:
PCI Configuration Register
(Size: 32 bits)
Offset:
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
MAX_LA
T
MIN_GNT
Re
se
rv
ed
0
INTPIN
INT
LIN
E
Bit
Range
Default &
Access
Field Name (ID): Description
31:24
00h
RO
Max_Lat (MAX_LAT):
Value of 0 indicates device has no major requirements for the
settings of latency timers.
23:16
00h
RO
Min_Gnt (MIN_GNT):
Value of 0 indicates device has no major requirements for the
settings of latency timers.
15:12
0h
RO
Reserved0:
Reserved.
11:8
1h
RO
Interrupt Pin (INTPIN):
Each AHB IP on Bridge is a Single function device. Hence
Bridge only generates INTA on IOSF SB. The Fabric on AHB Bridge appears as a
Multifunction device. Interrupt Pin Value in this register is reflected from the IPIN value
in the private configuration space.
7:0
00h
RW
Interrupt Line (INTLINE):
Bridge does not use this field directly. It is used to tell
software which interrupt line the interrupt pin is connected to.
Type:
PCI Configuration Register
(Size: 32 bits)
Offset:
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
PM
ES
U
P
PO
R
T
Re
se
rv
ed
0
VE
RSION
NXT
C
AP
PO
WE
R_CA
P