Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
4271
28.5.8
Expansion ROM Base Address (EXPANSION_ROM_BASEADDR)—
Offset 30h
Access Method
Default: 00000000h
28.5.9
Capabilities Pointer (CAPABILITYPTR)—Offset 34h
Access Method
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SU
BSY
S
TE
MID
SU
BSYS
TEMV
ENDORID
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:16
0000h
RW/O
Subsystem ID (SUBSYSTEMID): 
This register should be implemented for any 
function that could be instantiated more than once in a given system. The SID register, 
in combination with the Subsystem Vendor ID register, make it possible for the 
operating environment to distinguish one audio subsystem from the other. This register 
is a Read Write Once type register.
15:0
0000h
RW/O
Subsystem Vendor ID (SUBSYSTEMVENDORID): 
This register should be 
implemented for any function that could be instantiated more than once in a given 
system. The SVID register, in combination with the Subsystem ID register, enables the 
operating environment to distinguish one subsystem from the other. This register is a 
Read Write Once register.
Type: 
PCI Configuration Register
(Size: 32 bits)
Offset: 
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
EX
PA
N
S
IO
N_
R
O
M
_
B
A
S
E
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:0
00000000h
RO
EXPANSION_ROM_BASE: 
Reserved.
Type: 
PCI Configuration Register
(Size: 32 bits)
Offset: