Intel N2820 FH8065301616603 Data Sheet
Product codes
FH8065301616603
PCU – System Management Bus (SMBus)
1138
Datasheet
23.7.3
Host Command Register (SMB_Mem_HCMD)—Offset 3h
This eight bit field is transmitted by the host controller in the command field of the SMB
protocol during the execution of any command.
Access Method
Default: 00h
23.7.4
Transmit Slave Address Register (SMB_Mem_TSA)—Offset 4h
This register is transmitted by the host controller in the slave address field of the SMB
protocol. This is the address of the target
Access Method
Default: 00h
Type: Memory Mapped I/O Register
(Size: 8 bits)
SMB_Mem_HCMD: [MBARL] + 3h
MBARL Type: PCI Configuration Register (Size: 32 bits)
MBARL Reference: [B:0, D:31, F:3] + 10h
MBARL Reference: [B:0, D:31, F:3] + 10h
7
4
0
0
0
0
0
0
0
0
0
HC
MD
Bit
Range
Default &
Access
Description
7:0
00h
RW
HCMD: Command to be transmitted
Type: Memory Mapped I/O Register
(Size: 8 bits)
SMB_Mem_TSA: [MBARL] + 4h
MBARL Type: PCI Configuration Register (Size: 32 bits)
MBARL Reference: [B:0, D:31, F:3] + 10h
MBARL Reference: [B:0, D:31, F:3] + 10h
7
4
0
0
0
0
0
0
0
0
0
ADDR
RW
Bit
Range
Default &
Access
Description
7:1
0000000b
RW
ADDR: 7-bit address of the targeted slave
0
0b
RW
RW: Direction of the host transfer. 1 = read, 0 = write Note: Writes to TSA values of
0xA0 0xAE are blocked depending on the setting of the SPD write disable bit in HCFG
D31_F3_HostConfiguration.