Intel N2820 FH8065301616603 Data Sheet
Product codes
FH8065301616603
Datasheet
1205
PCU – iLB – Low Pin Count (LPC) Bridge
•
Continuous Mode: The interrupt controller is solely responsible for generating the
start frame
start frame
•
Quiet Mode: Peripheral initiates the start frame, and the interrupt controller
completes it.
completes it.
These modes are entered using the length of the stop frame.
Continuous mode must be entered first, to start the first frame. This start frame width
is 8 LPC clocks. This is a polling mode.
is 8 LPC clocks. This is a polling mode.
In Quiet mode, the ILB_LPC_SERIRQ line remains inactive and pulled up between the
Stop and Start Frame until a peripheral drives ILB_LPC_SERIRQ low. The interrupt
controller senses the line low and drives it low for the remainder of the Start Frame.
Since the first LPC clock of the start frame was driven by the peripheral, the interrupt
controller drives ILB_LPC_SERIRQ low for 1 LPC clock less than in continuous mode.
This mode of operation allows for lower power operation.
Stop and Start Frame until a peripheral drives ILB_LPC_SERIRQ low. The interrupt
controller senses the line low and drives it low for the remainder of the Start Frame.
Since the first LPC clock of the start frame was driven by the peripheral, the interrupt
controller drives ILB_LPC_SERIRQ low for 1 LPC clock less than in continuous mode.
This mode of operation allows for lower power operation.
25.2.7.3
Data Frames
Once the Start frame has been initiated, the ILB_LPC_SERIRQ peripherals start
counting frames based on the rising edge of ILB_LPC_SERIRQ. Each of the IRQ/DATA
frames has exactly 3 phases of 1 clock each:
counting frames based on the rising edge of ILB_LPC_SERIRQ. Each of the IRQ/DATA
frames has exactly 3 phases of 1 clock each:
•
Sample Phase: During this phase, a device drives ILB_LPC_SERIRQ low if its
corresponding interrupt signal is low. If its corresponding interrupt is high, then the
ILB_LPC_SERIRQ devices tri-state ILB_LPC_SERIRQ. ILB_LPC_SERIRQ remains
high due to pull-up resistors.
corresponding interrupt signal is low. If its corresponding interrupt is high, then the
ILB_LPC_SERIRQ devices tri-state ILB_LPC_SERIRQ. ILB_LPC_SERIRQ remains
high due to pull-up resistors.
•
Recovery Phase: During this phase, a device drives ILB_LPC_SERIRQ high if it
was driven low during the Sample Phase. If it was not driven during the sample
phase, it remains tri-stated in this phase.
was driven low during the Sample Phase. If it was not driven during the sample
phase, it remains tri-stated in this phase.
•
Turn-around Phase: The device tri-states ILB_LPC_SERIRQ.
25.2.7.4
Stop Frame
After the data frames, a Stop Frame will be driven by the interrupt controller.
ILB_LPC_SERIRQ will be driven low for two or three LPC clocks. The number of clocks is
determined by the SCNT.MD register bit. The number of clocks determines the next
mode, as indicated in
ILB_LPC_SERIRQ will be driven low for two or three LPC clocks. The number of clocks is
determined by the SCNT.MD register bit. The number of clocks determines the next
mode, as indicated in
25.2.7.5
Serial Interrupts Not Supported
There are four interrupts on the serial stream which are not supported by the interrupt
controller. These interrupts are:
controller. These interrupts are:
Table 177. SERIRQ, Stop Frame Width to Operation Mode Mapping
Stop Frame Width
Next Mode
Two LPC clocks
Quiet Mode: Any SERIRQ device initiates a Start Frame
Three LPC clocks
Continuous Mode: Only the interrupt controller initiates a Start Frame