Intel N2820 FH8065301616603 Data Sheet

Intel

Product codes

FH8065301616603

USB Host Controller Interfaces (xHCI, EHCI)

382

Datasheet

2098h

209Bh

“Event Ring Dequeue Pointer Low 4 (ERDP_LO4)—Offset 2098h” on page 432

00000000h

209Ch

209Fh

“Event Ring Dequeue Pointer High 4 (ERDP_HI4)—Offset 209Ch” on page 432

00000000h

20A0h

20A3h

“Interrupter 5 Management (IMAN5)—Offset 20A0h” on page 433

00000000h

20A4h

20A7h

“Interrupter 5 Moderation (IMOD5)—Offset 20A4h” on page 433

00000FA0h

20A8h

20ABh

“Event Ring Segment Table Size 5 (ERSTSZ5)—Offset 20A8h” on page 434

00000000h

20B0h

20B3h

“Event Ring Segment Table Base Address Low 5 (ERSTBA_LO5)—Offset 20B0h” on

00000000h

20B4h

20B7h

“Event Ring Segment Table Base Address High 5 (ERSTBA_HI5)—Offset 20B4h” on

00000000h

20B8h

20BBh

“Event Ring Dequeue Pointer Low 5 (ERDP_LO5)—Offset 20B8h” on page 435

00000000h

20BCh

20BFh

“Event Ring Dequeue Pointer High 5 (ERDP_HI5)—Offset 20BCh” on page 436

00000000h

20C0h

20C3h

“Interrupter 6 Management (IMAN6)—Offset 20C0h” on page 436

00000000h

20C4h

20C7h

“Interrupter 6 Moderation (IMOD6)—Offset 20C4h” on page 437

00000FA0h

20C8h

20CBh

“Event Ring Segment Table Size 6 (ERSTSZ6)—Offset 20C8h” on page 437

00000000h

20D0h

20D3h

“Event Ring Segment Table Base Address Low 6 (ERSTBA_LO6)—Offset 20D0h” on

00000000h

20D4h

20D7h

“Event Ring Segment Table Base Address High 6 (ERSTBA_HI6)—Offset 20D4h” on

00000000h

20D8h

20DBh

“Event Ring Dequeue Pointer Low 6 (ERDP_LO6)—Offset 20D8h” on page 439

00000000h

20DCh

20DFh

“Event Ring Dequeue Pointer High 6 (ERDP_HI6)—Offset 20DCh” on page 439

00000000h

20E0h

20E3h

“Interrupter 7 Management (IMAN7)—Offset 20E0h” on page 440

00000000h

20E4h

20E7h

“Interrupter 7 Moderation (IMOD7)—Offset 20E4h” on page 440

00000FA0h

20E8h

20EBh

“Event Ring Segment Table Size 7 (ERSTSZ7)—Offset 20E8h” on page 441

00000000h

20F0h

20F3h

“Event Ring Segment Table Base Address Low 7 (ERSTBA_LO7)—Offset 20F0h” on

00000000h

20F4h

20F7h

“Event Ring Segment Table Base Address High 7 (ERSTBA_HI7)—Offset 20F4h” on

00000000h

20F8h

20FBh

“Event Ring Dequeue Pointer Low 7 (ERDP_LO7)—Offset 20F8h” on page 442

00000000h

20FCh

20FFh

“Event Ring Dequeue Pointer High 7 (ERDP_HI7)—Offset 20FCh” on page 443

00000000h

2100h

2103h

“Interrupter 8 Management (IMAN8)—Offset 2100h” on page 443

00000000h

2104h

2107h

“Interrupter 8 Moderation (IMOD8)—Offset 2104h” on page 444

00000FA0h

2108h

210Bh

“Event Ring Segment Table Size 8 (ERSTSZ8)—Offset 2108h” on page 444

00000000h

2110h

2113h

“Event Ring Segment Table Base Address Low 8 (ERSTBA_LO8)—Offset 2110h” on

00000000h

2114h

2117h

“Event Ring Segment Table Base Address High 8 (ERSTBA_HI8)—Offset 2114h” on

00000000h

2118h

211Bh

“Event Ring Dequeue Pointer Low 8 (ERDP_LO8)—Offset 2118h” on page 446

00000000h

211Ch

211Fh

“Event Ring Dequeue Pointer High 8 (ERDP_HI8)—Offset 211Ch” on page 446

00000000h

3000h

3003h

“Door Bell 1 (DOORBELL1)—Offset 3000h” on page 447

00000000h

3004h

3007h

“Door Bell 2 (DOORBELL2)—Offset 3004h” on page 447

00000000h

3008h

300Bh

“Door Bell 3 (DOORBELL3)—Offset 3008h” on page 448

00000000h

300Ch

300Fh

“Door Bell 4 (DOORBELL4)—Offset 300Ch” on page 448

00000000h

Table 120.

Summary of USB xHCI Memory Mapped I/O Registers—MBAR (Continued)

Offset Start

Offset End

Register ID—Description

Default

Value