Intel N2820 FH8065301616603 Data Sheet
Product codes
FH8065301616603
Low Power Engine (LPE) for Audio (I
2
S)
700
Datasheet
16.2.1.2
Audio Encode
The Audio core supports encoding of the following formats:
•
MP3
•
AAC-LC
•
WMA
•
DD-2channel
16.3
Detailed Block Level Description
16.3.1
LPE Core
The LPE core in the processor runs at maximum frequency of 343 MHz and interfaces
with the rest of the processor system through the OCP bus. It is one of the masters on
the Audio Sub-Fabric The IA-32 CPU and LPE DMA engines are the other masters on the
fabric. The following figure shows the LPE core and its interfaces.
with the rest of the processor system through the OCP bus. It is one of the masters on
the Audio Sub-Fabric The IA-32 CPU and LPE DMA engines are the other masters on the
fabric. The following figure shows the LPE core and its interfaces.
The main DSP hardware is a two-multiplier, multiply/accumulate unit, a register file
LPE_PR to hold pairs of 24-bit data items, a register file LPE-OR to hold 56-bit
accumulator values, an arithmetic/logic unit to operate on the LPE_PR and LPE_OR
values, and a shift unit to operate on the LPE_PR and LPE_OR values. The multiply/
LPE_PR to hold pairs of 24-bit data items, a register file LPE-OR to hold 56-bit
accumulator values, an arithmetic/logic unit to operate on the LPE_PR and LPE_OR
values, and a shift unit to operate on the LPE_PR and LPE_OR values. The multiply/
Figure 21. Audio Cluster Block Diagram
SSP0
Bridge
JTAG
JTAG
Trace
Trace
Logic
Interrupt
LPE
Core
EXT
I/F
LPE
Shim
Control &
Config. Signals
A
U
D
U
D
I
O
S
u
b
b
F
a
b
a
b
r
I
c
Instruction
RAM
Data RAM
64-bit
Data
Cache
Instruction
Cache
4KB
Mailbox
LPE
DMA_00
LPE
DMA_01
32-bit OCP Slave
32-bit APB Slave
32-bit OCP Master Writes
32-bit OCP Master Reads
32-bit OCP Slave
32-bit OCP Master Writes
32-bit OCP Master Reads
OCP
To/From
IOSF2OCP bridge
M/N
CLK
SSP1
M/N
CLK
32-bit APB Slave
SSP2
M/N
CLK
32-bit APB Slave