Philips 8-bit microcontroller with two-clock 80C51 core UM10109 User Manual
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
User manual
Rev. 02 — 23 May 2005
106 of 133
Philips Semiconductors
UM10109
P89LPC932A1 User manual
Byte Mode: In this mode data can be read and written to one byte at a time. Data is in the
DEEDAT register and the address is in the DEEADR register. Each write requires
approximately 4 ms to complete. Each read requires three machines after writing the
address to the DEEADR register.
DEEDAT register and the address is in the DEEADR register. Each write requires
approximately 4 ms to complete. Each read requires three machines after writing the
address to the DEEADR register.
Row Fill: In this mode the addressed row (64 bytes, with address DEEADR[5:0] ignored) is
filled with the DEEDAT pattern. To erase the entire row to 00h or program the entire row to
FFh, write 00h or FFh to DEEDAT prior to row fill. Each row fill requires approximately
4 ms to complete.
filled with the DEEDAT pattern. To erase the entire row to 00h or program the entire row to
FFh, write 00h or FFh to DEEDAT prior to row fill. Each row fill requires approximately
4 ms to complete.
Block Fill: In this mode all 512 bytes are filled with the DEEDAT pattern. To erase the block
to 00h or program the block to FFh, write 00h or FFh to DEEDAT prior to the block fill. Prior
to using this command EADR8 must be set = 1. Each Block Fill requires approximately
4 ms to complete.
to 00h or program the block to FFh, write 00h or FFh to DEEDAT prior to the block fill. Prior
to using this command EADR8 must be set = 1. Each Block Fill requires approximately
4 ms to complete.
In any mode, after the operation finishes, the hardware will set EEIF bit. An interrupt can
be enabled via the IEN1.7 bit. If IEN1.7 and the EA bits are set, it will generate an interrupt
request. The EEIF bit will need to be cleared by software.
be enabled via the IEN1.7 bit. If IEN1.7 and the EA bits are set, it will generate an interrupt
request. The EEIF bit will need to be cleared by software.
17.1 Data EEPROM read
A byte can be read via polling or interrupt:
1. Write to DEECON with ECTL1/ECTL0 (DEECON[5:4]) = ‘00’ and correct bit 8 address
to EADR8. (Note that if the correct values are already written to DEECON, there is no
need to write to this register.)
need to write to this register.)
2. Without writing to the DEEDAT register, write address bits 7 to 0 to DEEADR.
3. If both the EIEE (IEN1.7) bit and the EA (IEN0.7) bit are logic 1s, wait for the Data
EEPROM interrupt then read/poll the EEIF (DEECON.7) bit until it is set to logic 1. If
EIEE or EA is logic 0, the interrupt is disabled, only polling is enabled.
EIEE or EA is logic 0, the interrupt is disabled, only polling is enabled.
4. Read the Data EEPROM data from the DEEDAT SFR.
Table 92:
Data EEPROM control register (DEECON address F1h) bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
EEIF
HVERR
ECTL1
ECTL0
-
-
-
EADR8
Reset
0
0
0
0
0
0
x
0
Table 93:
Data EEPROM control register (DEECON address F1h) bit description
Bit Symbol
Description
0
EADR8
Most significant address (bit 8) of the Data EEPROM. EADR7-0 are in DEEADR.
1:3
Reserved.
5:4
ECTL1:0 Operation mode selection:
The following modes are selected by ECTL[1:0]:
00 — Byte read / write mode.
01 — Reserved.
10 — Row (64 bytes) fill.
11 — Block fill (512 bytes).
6
HVERR
High voltage error. Indicates a programming voltage error during program or erase.
7
EEIF
Data EEPROM interrupt flag. Set when a read or write finishes, reset by software.