Oracle Vacuum Cleaner CPU-56T User Manual

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UltraSPARC IIi+ Processor
Devices’ Features and Data Paths
SPARC/CPU−56T
75
UltraSPARC IIi+ Processor
The UltraSPARC IIi+ processor is based on the SPARC V9 architecture with VIS
instruction set and supports up to 4 GByte of memory. Important features are:
S 650 MHz frequency
S Four−way superscalar processor
S 64−bit data paths
S 64−bit address arithmetic
S 41−bit virtual addressing
S 16 KByte instruction cache
S 16 KByte non−blocking primary data cache
S 512 KByte second level cache
S Sensors for observing CPU on−die temperature