Oracle Vacuum Cleaner CPU-56T User Manual

Two on−board Intel LXT971 PHY devices are connected to the MII. They transform the
MII into a 10/100BaseT Ethernet interface which is available either via front panel or via
IOBP.

a

Important features of the PHY device are:

S Support for ISO/IEC 8802−3 Ethernet

S Support for Shielded Twisted Pair (STP) and Unshielded Twisted Pair (UTP)

category−5 cables of up to 100 meters length

S Operation in half−duplex and full−duplex mode possible

S Speed adjustion either manually or via auto−negotiation

Four USB channels are provided with each channel supporting 1.5 MBit/s and 12 MBit/s.
All USB interfaces provide auto resume from power managed (suspended) state.

a

The USB interfaces 1, 2 and 3 are routed to the CPU board

′s IOBP where they are available

via three front connectors. USB interface 4 is unused.

a

The USB interfaces provide the host controllers for USB transfers and a four−port
integrated hub. The host controller manages the control and data flow. It also provides
connection management and provides status information. The hub enables tiered star
topology to provide multiple connections.

a